• 제어로봇시스템학회:학술대회논문집
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• 제어로봇시스템학회 1999년도 제14차 학술회의논문집
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• pp.244-247
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• 1999

This paper presents a methodology of the technique for controlling DC motor drive by implementation of 2-quadrant operating mode which can ensure the torque controlling and speed with response time less than 2 seconds at all loading conditions. By implementation of BRM technique, energy is fed with definite values of BRM 256 bits, with different patterns of high accuracy, and fixing scan time at 0.667 ms, the ripple is less than 1%, thus high efficiency can be achieved, from the consequence of the accuracy of energy feeding at low current. The stability of the whole system can be determined from circle criterion by root locus method . The instant reverse direction of rotation can be done by decreasing the energy to the lowest level while motor is running with no load and variable load at the speed about 100-120 rpm and 50-60 rpm.

• 전기학회논문지
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• 제64권8호
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• pp.1256-1261
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• 2015

Along with the increase of railway catenary system operation speed to 400 km/h, there have been growing demands for good quality current collection systems that satisfy quality standards as well as criteria for safe working. Retaining uniform elasticity tension of contact wires is essential in maintaining high quality contact between pantograph and OCL (Overhead Contact Line) of current collection systems in high speed railways. Therefore, the tension of contact wire must be kept within tight tolerance limits in both working conditions and adverse weather conditions of catenary system. In accordance with these conditions, this paper presents a real time monitoring system for the tensioning device of the newly installed catenary system on the special route of Honam high speed line for 400 km/h operation. For the verification of the true value of tension of contact wires, we have developed ring-type tensioning sensors which were installed on supporting points of mast which compose the catenary system. According to the field test performed on the Honam high speed line catenary system, variation of tension was measured accurately in real-time.

• Journal of Power Electronics
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• 제10권1호
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• pp.65-71
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• 2010

This paper presents the design and implementation of voltage source inverter type SVPWM based speed control of an induction motor using a fuzzy PI controller. This scheme enables us to adjust the speed of the motor by controlling the frequency and amplitude of the stator voltage; the ratio of the stator voltage to the frequency should be kept constant. A model of the fuzzy control system is implemented in real time with a Xilinx FPGA XC3S 400E. It is introduced to maintain a constant speed to when the load varies.

• Tribology and Lubricants
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• 제33권6호
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• pp.245-250
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• 2017

In this work, we examine pure water and water with nanoparticles to investigate water lubrication characteristics and the effect of nanoparticles as lubricant additives for different substrates. We test carbon-based coatings and metals such as high-speed steel and stainless steel in pure deionized (DI) water and DI water with nanoparticles. We investigate water lubrication characteristics and the effect of nanoparticles based on the friction coefficient and wear rate for different substrates. The investigation reveals that nanoparticles enhance the friction and wear properties of high-speed steel and stainless steel. The friction coefficient and wear rate of both high-speed steel and stainless steel decreases in DI water with nanoparticles compared with the results in pure DI water. The presence of nanoparticles in water show good lubricating effect at the contact area for both high-speed steel and stainless steel. However, for carbon-based coatings, nanoparticles do not improve friction and wear properties. Rather, the friction coefficient and wear rate increases with an increase in the concentration of nanoparticles in case of water lubrication. Because carbon-based coatings already have good tribological properties in a water environment, nanoparticles in water do not contribute toward improving the friction and wear properties of carbon-based coatings.

• 전기학회논문지P
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• 제60권4호
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• pp.262-266
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• 2011

In high data-rate communication systems, encryption/decryption must be processed in high speed. In this paper, we implement CCM security mode which is the basis of security. Specifically, we combine CCM with AES block encryption algorithm in hardware. With the combination, we can carry out encryption/decryption as well as data transmission/reception simultaneously without reducing data-rate, and we keep low-power consumption with high speed by optimizing CCM block.

• 한국정보통신설비학회:학술대회논문집
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• 한국정보통신설비학회 2006년도 하계학술대회
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• pp.57-61
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• 2006

As high speed internet users are tremendously increasing, three are keenly in need of development of high speed portable internet technology which can provide high quality wireless internet service cheaply even in the mobile. Unlike the FDD-CDMA, TDD-OFDMA has relatively poor wave environment with inducing interference, fading and delay because it agrees to multi-carrier modulation method and time-division radio telecommunication system. To solve this problem, it is necessary to develop repeater operating by digital signal processing method which have more strict wireless channel control and wave signal processing technology over TDD telecommunication equipments. This thesis is dealing with design and implementation of Digital RF Repeater which implemented 'Synchronization Acquisition Unit', 'TDD signal switching Unit', 'Feedback Signal Cancellation Unit'. Over this argument, we will develop digital RF repeater with more cheap, more adaptive in wave environment like oscillation control, adaptive wave monitoring and output increasing and having control function as a result it will be helpful for success in high speed portable internet service business.

• 전자공학회논문지B
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• 제30B권10호
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• pp.1-12
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• 1993

A multiprocessor system for high-speed processing of hybrid image coding algorithms such as H.261, MPEG, or Digital HDTV is presented in this study. Using a combination of highly parallel 32-bit microprocessor, DCT(Discrete Cosine Transform), and motion detection processor, a new processing module is designed for the implementation of high performance coding system. The sysyem is implemented to allow parallel processing since a single module alone cannot perform hybrid coding algorithms at high speed, and crossbar switch is used to realize various parallel processing architectures by altering interconnections between processing modules within the system.

• ETRI Journal
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• 제30권5호
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• pp.707-717
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• 2008

This paper presents two types of high-speed hardware architectures for the block cipher ARIA. First, the loop architectures for feedback modes are presented. Area-throughput trade-offs are evaluated depending on the S-box implementation by using look-up tables or combinational logic which involves composite field arithmetic. The sub-pipelined architectures for non-feedback modes are also described. With loop unrolling, inner and outer round pipelining techniques, and S-box implementation using composite field arithmetic over $GF(2^4)^2$, throughputs of 16 Gbps to 43 Gbps are achievable in a 0.25 ${\mu}m$ CMOS technology. This is the first sub-pipelined architecture of ARIA for high throughput to date.

• 한국정보통신설비학회:학술대회논문집
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• 한국정보통신설비학회 2005년도 하계학술대회
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• pp.10-15
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• 2005

In the area of mobile communication, Location Based Services (LBS) using the location of mobile terminal to provide their services are rapidly spreading as communication network and terminal evolves. Despite the LBS are highly demanded in high speed internet area, the services are very rare due to the difficulty locating terminals. In this paper, we propose the method to locate terminals in real time and describe its implementation system. The proposed system is designed to collect the information in real time for more than a terminal connecting internet. And, the system shows high performancecollecting and generating location information through simulation tests.

• 전자공학회논문지B
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• 제31B권6호
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• pp.10-16
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• 1994

In case of off-line character recognition with statistical method, the character recognition speed for Korean or Chinese characters is slow since the amount of calculation is huge. To improve this problem, we seperate the recognition steps into several functional stages and implement them with hardwares for each stage so that all the stages can be processed with pipline structure. In accordance with temporal parallel processing, a high speed character recognition system can be implemented. In this paper, we implement a classification hardware, which is one of the several functional stages, to improve the speed by parallel structure with multiple DSPs(Digital Signal Processors). Also, it is designed to be able to expand DSP boards in parallel to make processing faster as much as we wish. We implement the hardware as an add-on board in IBM-PC, and the result of experiment is that it can process about 47-times and 71-times faster with 2 DSPs and 3 DSPs respectively than the IBM-PC(486D$\times$2-66MHz). The effectiveness is proved by developing a high speed OCR(Optical Character Recognizer).