Immunization has been one of the most effective measures preventing from infectious diseases. However, children routine vaccination rate of Korea was 68.2% and it was not higher than expected. Korean government revised the School Health Law for every primary school children to submit the vaccination certificate record from 2005. It is quite important national Infectious disease prevention policy to keep the immunizations rate high and monitor the immunizations rate continuously. To do this, National Institute of Health introduced the National Immunization Registry(NIR) Program at 2000. Objective : The aims of this study was to evaluate the Immunization Registry program which has been implementing since 2000 at the Public Health Centers(PHC). Methods : The mail survey was done from November 2001 to January 2002. 169 (69%) Public Health Centers among 244 PHC were responded. Results : The respondents of PHC sud the Immunization Registry(IR) program had reduced the workload (18.5%). 69.2% said they inputted the immunization data into the IR program after the shots were given. 86.5% said they hadn´t checked or retrieved the children lists who had missed the scheduled immunization. Only 17.2% said the speed of internet for the R program was good. It showed that 20% of respondents hadn´t written down documents, records on immunization any more. Even there were a lot of negative results, the respondents of PHC thought that the IR program was effective. They especially agreed that the IR program could make the job accurate (81.5%), convenient (71.3%), and reduced the chances of making mistakes (71.3%), increase the service quality (78.5%). And they were well adapting the job process of the IR (79.63%). Bivariate analysis showed that the software program was the important determinants of IR success. The only Bit Computer software program has been evaluated to be less satisfactory than the Integrated (Posdata operating system + Bit software) program. Other variables, such as age, duration of present job, and location of PHC (metropolitan, small city, rural area) were not significantly related. Conclusion : It seemed that the success of NIR might depend on the software program. Because Integrated program, which has been developed from 1994, include not only the general operating and management program for PHC but also IR program. It was natural to prefer Integrated program to Bit software program. So we can suggest that it is essential for the NIR to be successful that not only the immunization software program but also hardware equipments and public health information system should be further improved.
Maintenance of the roads and bridges is a major issue for all road administrators around the world, and various initiatives are being implemented in each region for the purpose of controlling the ever increasing road maintenance cost while ensuring the safety of the vehicles driving. Efforts for such initiatives have also been made in Asia and initiatives for managing heavy-weight vehicles have recently gained momentum in Korea and Japan. We have developed a technology for unevenly installing bar-shaped sensors (piezo quartz sensors) to enable dynamic axle load measurement at a highly accurate level, and have estimated our measurement accuracy of axle load/gross weight, etc. on an actual road. The measurement accuracy of the axle load/gross weight varies significantly depending on the number of sensors installed. In our implementation, the target accuracy was set to below ${\pm}5%$ for gross weight measurement so that automatic regulation can be applied. We have achieved our target by installing 8-point measurement system. However, to have this technology widely accepted, it was necessary to reduce the system size so that it can be easily implemented. Therefore, we have estimated the relationship between the measurement accuracy and the system size (number of measurement points), and have come up with the proposal of 3-point measurement as an optimum number of measurement points, and have estimated its performance on an actual road. Additionally, we evaluated the relationship between the measurement accuracy and vehicle velocity.
Park, ByeongGyu;Kim, Suhri;Kim, Hanbit;Jin, Sunghyun;Kim, HeeSeok;Hong, Seokhie
Journal of the Korea Institute of Information Security & Cryptology
/
v.28
no.5
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pp.1099-1112
/
2018
The field of post-quantum cryptography (PQC) is an active area of research as cryptographers look for public-key cryptosystems that can resist quantum adversaries. Among those categories in PQC, code-based cryptosystem provides high security along with efficiency. Recent works on code-based cryptosystems focus on the side-channel resistant implementation since previous works have indicated the possible side-channel vulnerabilities on existing algorithms. In this paper, we recovered the secret key in HyMES(Hybrid McEliece Scheme) using a single power consumption trace. HyMES is a variant of McEliece cryptosystem that provides smaller keys and faster encryption and decryption speed. During the decryption, the algorithm computes the parity-check matrix which is required when computing the syndrome. We analyzed HyMES using the fact that the joint distributions of nonlinear functions used in this process depend on the secret key. To the best of our knowledge, we were the first to propose the side-channel analysis based on joint distributions of leakages on public-key cryptosystem.
Journal of the Korea Academia-Industrial cooperation Society
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v.17
no.3
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pp.699-707
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2016
This paper proposes a low-complexity central processing unit (CPU) that is suitable for deeply embedded systems, including Internet of things (IoT) applications. The core features a 16-bit instruction set architecture (ISA) that leads to high code density, as well as a multicycle architecture with a counter-based control unit and adder sharing that lead to a small hardware area. A co-processor, instruction cache, AMBA bus, internal SRAM, external memory, on-chip debugger (OCD), and peripheral I/Os are placed around the core to make a system-on-a-chip (SoC) platform. This platform is based on a modified Harvard architecture to facilitate memory access by reducing the number of access clock cycles. The SoC platform and CPU were simulated and verified at the C and the assembly levels, and FPGA prototyping with integrated logic analysis was carried out. The CPU was synthesized at the ASIC front-end gate netlist level using a $0.18{\mu}m$ digital CMOS technology with 1.8V supply, resulting in a gate count of merely 7700 at a 50MHz clock speed. The SoC platform was embedded in an FPGA on a miniature board and applied to deeply embedded IoT applications.
Journal of Advanced Marine Engineering and Technology
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v.38
no.7
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pp.929-935
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2014
This paper is study on the pressure monitoring system(PMS) for ship's engine performance analysis( SEPA) based on web, with high speed and accuracy. This system is composed of pressure sensor, monitoring module with multi channel A/D converter, TCP/IP and satellite internet communication system. Existing domestic products measure cylinder pressure when piston of first explosive cylinder reached TDC(the top dead center) point and then measure next cylinder pressure manually each angle divided by a constant rotating interval. But presented system monitors in the local and web computer, using pressure information transmitted from pressure sensor installed on each engine. In this system, it is possible to increase the accuracy of the engine performance analysis because not only each TDC points but cylinder pressures synchronized with the TDC points could be measured in real time, accurately. And therefore, it may be used in a various diagnosis of main engines, such as deviations of each cylinder maximum pressures(Pmax) and the TDC firing positions and combustion conditions.
In this paper, we present the design and implementation of a large-scale qualitative spatial reasoner using Apache Spark, an in-memory high speed cluster computing environment, which is effective for sequencing and iterating component reasoning jobs. The proposed reasoner can not only check the integrity of a large-scale spatial knowledge base representing topological and directional relationships between spatial objects, but also expand the given knowledge base by deriving new facts in highly efficient ways. In general, qualitative reasoning on topological and directional relationships between spatial objects includes a number of composition operations on every possible pair of disjunctive relations. The proposed reasoner enhances computational efficiency by determining the minimal set of disjunctive relations for spatial reasoning and then reducing the size of the composition table to include only that set. Additionally, in order to improve performance, the proposed reasoner is designed to minimize disk I/Os during distributed reasoning jobs, which are performed on a Hadoop cluster system. In experiments with both artificial and real spatial knowledge bases, the proposed Spark-based spatial reasoner showed higher performance than the existing MapReduce-based one.
Journal of the Korean Institute of Intelligent Systems
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v.14
no.5
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pp.648-654
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2004
The Mass Flow Controller(MFC) has become crucial in semiconductor manufacturing equipments. It is an important element because the quality and the yield of a semiconductor process are decided by the accurate flow control of gas. Therefore, the demand for implementing the high speed and the highly accurate control of MFCs has been increasing. It is hard to find an article of the control algorithm applied to MFCs. But, it is known that commercially available MFCs adopt PID control algorithms. Particularly, when the system detects the flow by way of heat transfer, the MFC control problem includes the slow response and the nonlinearity. In this paper, MFC control algorithm with a superior performance to the conventional PID algorithm is discussed and the superiority is demonstrated through the experiment. A fuzzy controller was utilized in order to compensate the nonlinearity and the slow response, and the performance is compared with that of an MFC currently available in the market. The control system, in this paper, consists of a personal computer, the data acquisition board and the control algorithm carried out by LabWindows/CVI program on the PC. In addition, a method of estimating the actual flow from the sensor output with the slow response is presented. In conclusion, according to the result of the experiment, the proposed algorithm shows better accuracy and is faster than the conventional controller.
Kim, Seung-Ju;Min, Seok-Hong;Kim, Byung-Chul;Lee, Jae-Yong;Hong, Won-Taek
Journal of the Institute of Electronics Engineers of Korea TC
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v.48
no.9
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pp.35-46
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2011
Future Internet should support more efficient mobility management, flexible traffic engineering and various emerging new services. So, lots of traffic engineering techniques have been suggested and developed, but it's impossible to apply them on the current running commercial Internet. To overcome this problem, OpenFlow protocol was proposed as a technique to control network equipments using network controller with various networking applications. It is a software defined network, so researchers can verify their own traffic engineering techniques by applying them on the controller. In addition, for high-speed packet processing in the OpenFlow network, programmable NetFPGA card with four 1G-interfaces and commercial Procurve OpenFlow switches can be used. In this paper, we implement an OpenFlow test-bed using hardware-accelerated NetFPGA cards and Procurve switches on the KREONET, and implement CSPF (Constraint-based Shortest Path First) algorithm, which is one of popular QoS routing algorithms, and apply it on the large-scale testbed to verify performance and efficiency of multimedia traffic engineering scheme in Future Internet.
Journal of the Institute of Electronics Engineers of Korea SC
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v.44
no.5
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pp.62-70
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2007
In this paper, the boost Power Factor Correction(PFC) technique for Direct Torque Control(DTC) of brushless DC motor drive in the constant torque region is implemented on a TMS320F2812DSP. Unlike conventional six-step PWM current control, by properly selecting the inverter voltage space vectors of the two-phase conduction mode from a simple look-up table at a predefined sampling time, the desired quasi-square wave current is obtained, therefore a much faster torque response is achieved compared to conventional current control. Furthermore, to eliminate the low-frequency torque oscillations caused by the non-ideal trapezoidal shape of the actual back-EMF waveform of the BLDC motor, a pre-stored back-EMF versus position look-up table is designed. The duty cycle of the boost converter is determined by a control algorithm based on the input voltage, output voltage which is the dc-link of the BLDC motor drive, and inductor current using average current control method with input voltage feed-forward compensation during each sampling period of the drive system. With the emergence of high-speed digital signal processors(DSPs), both PFC and simple DTC algorithms can be executed during a single sampling period of the BLDC motor drive. In the proposed method, since no PWM algorithm is required for DTC or BLDC motor drive, only one PWM output for the boost converter with 80 kHz switching frequency is used in a TMS320F2812 DSP. The validity and effectiveness of the proposed DTC of BLDC motor drive scheme with PFC are verified through the experimental results. The test results verify that the proposed PFC for DTC of BLDC motor drive improves power factor considerably from 0.77 to as close as 0.9997 with and without load conditions.
Park Sung-Ho;Choi Hyun-Jun;Seo Young-Ho;Kim Dong-Wook
Journal of the Institute of Electronics Engineers of Korea SP
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v.42
no.2
s.302
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pp.27-36
/
2005
This thesis proposed an effective encryption method for the DCT-based image/video contents and made it possible to operate in a high speed by implementing it as an optimized hardware. By considering the increase in the amount of the calculation in the image/video compression, reconstruction and encryption, an partial encryption was performed, in which only the important information (DC and DPCM coefficients) were selected as the data to be encrypted. As the result, the encryption cost decreased when all the original image was encrypted. As the encryption algorithm one of the multi-mode AES, DES, or SEED can be used. The proposed encryption method was implemented in software to be experimented with TM-5 for about 1,000 test images. From the result, it was verified that to induce the original image from the encrypted one is not possible. At that situation, the decrease in compression ratio was only $1.6\%$. The hardware encryption system implemented in Verilog-HDL was synthesized to find the gate-level circuit in the SynopsysTM design compiler with the Hynix $0.25{\mu}m$ CMOS Phantom-cell library. Timing simulation was performed by Verilog-XL from CadenceTM, which resulted in the stable operation in the frequency above 100MHz. Accordingly, the proposed encryption method and the implemented hardware are expected to be effectively used as a good solution for the end-to-end security which is considered as one of the important problems.
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