• Title/Summary/Keyword: High voltage power semiconductor

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Fabrication of Schottky Device Using Lead Sulfide Colloidal Quantum Dot

  • Kim, Jun-Kwan;Song, Jung-Hoon;An, Hye-Jin;Choi, Hye-Kyoung;Jeong, So-Hee
    • Proceedings of the Korean Vacuum Society Conference
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    • 2012.08a
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    • pp.189-189
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    • 2012
  • Lead sulfide (PbS) nanocrystal quantum dots (NQDs) are promising materials for various optoelectronic devices, especially solar cells, because of their tunability of the optical band-gap controlled by adjusting the diameter of NQDs. PbS is a IV-VI semiconductor enabling infrared-absorption and it can be synthesized using solution process methods. A wide choice of the diameter of PbS NQDs is also a benefit to achieve the quantum confinement regime due to its large Bohr exciton radius (20 nm). To exploit these desirable properties, many research groups have intensively studied to apply for the photovoltaic devices. There are several essential requirements to fabricate the efficient NQDs-based solar cell. First of all, highly confined PbS QDs should be synthesized resulting in a narrow peak with a small full width-half maximum value at the first exciton transition observed in UV-Vis absorbance and photoluminescence spectra. In other words, the size-uniformity of NQDs ought to secure under 5%. Second, PbS NQDs should be assembled carefully in order to enhance the electronic coupling between adjacent NQDs by controlling the inter-QDs distance. Finally, appropriate structure for the photovoltaic device is the key issue to extract the photo-generated carriers from light-absorbing layer in solar cell. In this step, workfunction and Fermi energy difference could be precisely considered for Schottky and hetero junction device, respectively. In this presentation, we introduce the strategy to obtain high performance solar cell fabricated using PbS NQDs below the size of the Bohr radius. The PbS NQDs with various diameters were synthesized using methods established by Hines with a few modifications. PbS NQDs solids were assembled using layer-by-layer spin-coating method. Subsequent ligand-exchange was carried out using 1,2-ethanedithiol (EDT) to reduce inter-NQDs distance. Finally, Schottky junction solar cells were fabricated on ITO-coated glass and 150 nm-thick Al was deposited on the top of PbS NQDs solids as a top electrode using thermal evaporation technique. To evaluate the solar cell performance, current-voltage (I-V) measurement were performed under AM 1.5G solar spectrum at 1 sun intensity. As a result, we could achieve the power conversion efficiency of 3.33% at Schottky junction solar cell. This result indicates that high performance solar cell is successfully fabricated by optimizing the all steps as mentioned above in this work.

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Simulation on Optimum Doping Levels in Si Solar Cells

  • Choe, Kwang Su
    • Korean Journal of Materials Research
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    • v.30 no.10
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    • pp.509-514
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    • 2020
  • The two key variables of an Si solar cell, i.e., emitter (n-type window layer) and base (p-type substrate) doping levels or concentrations, are studied using Medici, a 2-dimensional semiconductor device simulation tool. The substrate is p-type and 150 ㎛ thick, the pn junction is 2 ㎛ from the front surface, and the cell is lit on the front surface. The doping concentration ranges from 1 × 1010 cm-3 to 1 × 1020 cm-3 for both emitter and base, resulting in a matrix of 11 by 11 or a total of 121 data points. With respect to increasing donor concentration (Nd) in the emitter, the open-circuit voltage (Voc) is little affected throughout, and the short-circuit current (Isc) is affected only at a very high levels of Nd, exceeding 1 × 1019 cm-3, dropping abruptly by about 12%, i.e., from Isc = 6.05 × 10-9 A·㎛-1, at Nd = 1 × 1019 cm-3 to Isc = 5.35 × 10-9 A·㎛-1 at Nd = 1 × 1020 cm-3, likely due to minority-carrier, or hole, recombination at the very high doping level. With respect to increasing acceptor concentration (Na) in the base, Isc is little affected throughout, but Voc increases steadily, i.e, from Voc = 0.29 V at Na = 1 × 1012 cm-3 to 0.69 V at Na = 1 × 1018 cm-3. On average, with an order increase in Na, Voc increases by about 0.07 V, likely due to narrowing of the depletion layer and lowering of the carrier recombination at the pn junction. At the maximum output power (Pmax), a peak value of 3.25 × 10-2 W·cm-2 or 32.5 mW·cm-2 is observed at the doping combination of Nd = 1 × 1019 cm-3, a level at which Si is degenerate (being metal-like), and Na = 1 × 1017 cm-3, and minimum values of near zero are observed at very low levels of Nd ≤ 1 × 1013 cm-3. This wide variation in Pmax, even within a given kind of solar cell, indicates that selecting an optimal combination of donor and acceptor doping concentrations is likely most important in solar cell engineering.

A 0.31pJ/conv-step 13b 100MS/s 0.13um CMOS ADC for 3G Communication Systems (3G 통신 시스템 응용을 위한 0.31pJ/conv-step의 13비트 100MS/s 0.13um CMOS A/D 변환기)

  • Lee, Dong-Suk;Lee, Myung-Hwan;Kwon, Yi-Gi;Lee, Seung-Hoon
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.46 no.3
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    • pp.75-85
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    • 2009
  • This work proposes a 13b 100MS/s 0.13um CMOS ADC for 3G communication systems such as two-carrier W-CDMA applications simultaneously requiring high resolution, low power, and small size at high speed. The proposed ADC employs a four-step pipeline architecture to optimize power consumption and chip area at the target resolution and sampling rate. Area-efficient high-speed high-resolution gate-bootstrapping circuits are implemented at the sampling switches of the input SHA to maintain signal linearity over the Nyquist rate even at a 1.0V supply operation. The cascode compensation technique on a low-impedance path implemented in the two-stage amplifiers of the SHA and MDAC simultaneously achieves the required operation speed and phase margin with more reduced power consumption than the Miller compensation technique. Low-glitch dynamic latches in sub-ranging flash ADCs reduce kickback-noise referred to the differential input stage of the comparator by isolating the input stage from output nodes to improve system accuracy. The proposed low-noise current and voltage references based on triple negative T.C. circuits are employed on chip with optional off-chip reference voltages. The prototype ADC in a 0.13um 1P8M CMOS technology demonstrates the measured DNL and INL within 0.70LSB and 1.79LSB, respectively. The ADC shows a maximum SNDR of 64.5dB and a maximum SFDR of 78.0dB at 100MS/s, respectively. The ABC with an active die area of $1.22mm^2$ consumes 42.0mW at 100MS/s and a 1.2V supply, corresponding to a FOM of 0.31pJ/conv-step.

2-Hexylthieno[3,2-b]thiophene-substituted Anthracene Derivatives for Organic Field Effect Transistors and Photovoltaic Cells

  • Jo, So-Young;Hur, Jung-A;Kim, Kyung-Hwan;Lee, Tae-Wan;Shin, Ji-Cheol;Hwang, Kyung-Seok;Chin, Byung-Doo;Choi, Dong-Hoon
    • Bulletin of the Korean Chemical Society
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    • v.33 no.9
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    • pp.3061-3070
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    • 2012
  • Novel 2-hexylthieno[3,2-b]thiophene-containing conjugated molecules have been synthesized via a reduction reaction using tin chloride in an acidic medium. They exhibited good solubility in common organic solvents and good self-film and crystal-forming properties. The single-crystalline objects were fabricated by a solvent slow diffusion process and then were employed for fabricating field-effect transistors (FETs) along with thinfilm transistors (TFTs). TFTs made of 5 and 6 exhibited carrier mobility as high as 0.10-0.15 $cm^2V^{-1}s^{-1}$. The single-crystal-based FET made of 6 showed 0.70 $cm^2V^{-1}s^{-1}$ which was relatively higher than that of the 5-based FET (${\mu}=0.23cm^2V^{-1}s^{-1}$). In addition, we fabricated organic photovoltaic (OPV) cells with new 2-hexylthieno [3,2-b]thiophene-containing conjugated molecules and methanofullerene [6,6]-phenyl C61-butyric acid methyl ester ($PC_{61}BM$) without thermal annealing. The ternary system for a bulk heterojunction (BHJ) OPV cell was elaborated using $PC_{61}BM$ and two p-type conjugated molecules such as 5 and 7 for modulating the molecular energy levels. As a result, the OPV cell containing 5, 7, and $PC_{61}BM$ had improved results with an open-circuit voltage of 0.90 V, a short-circuit current density of 2.83 $mA/cm^2$, and a fill factor of 0.31, offering an overall power conversion efficiency (PCE) of 0.78%, which was larger than those of the devices made of only molecule 5 (${\eta}$~0.67%) or 7 (${\eta}$~0.46%) with $PC_{61}BM$ under identical weight compositions.

Characterization of epitaxial layers on beta-gallium oxide single crystals grown by EFG method as a function of different crystal faces and off-angle (EFG 법으로 성장시킨 β-Ga2O3 단결정의 다양한 결정면, off-angle에 따른 epitaxial layer의 특성 분석)

  • Min-Ji Chae;Sun-Yeong Seo;Hui-Yeon Jang;So-Min Shin;Dae-Uk Kim;Yun-Jin Kim;Mi-Seon Park;Gwang-Hee Jung;Jin-Ki Kang;Hae-Yong Lee;Won-Jae Lee
    • Journal of the Korean Crystal Growth and Crystal Technology
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    • v.34 no.4
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    • pp.109-116
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    • 2024
  • β-Ga2O3 is a representative ultra-wide bandgap (UWBG) semiconductor that has attracted much attention for power device applications due to its wide-bandgap of 4.9 eV and high-breakdown voltage of 8 MV/cm. In addition, because solution growth is possible, it has advantages such as fast growth rate and lower production cost compared to SiC and GaN [1-2]. In this study, we have successfully grown Si-doped 10 mm thick Si-doped β-Ga2O3 single crystals by the EFG (Edge-defined Film-fed Growth) method. The growth direction and growth principal plane were set to [010] / (010), respectively, and the growth speed was 7~20 mm/h. The as-grown β-Ga2O3 single crystal was cut into various crystal planes (001, 100, ${\bar{2}}01$) and off-angles (1o, 3o, 4o), and then surface processed. After processed, the homoepitaxial layer was grown on the epi-ready substrate using the HVPE (Halide vapor phase epitaxy) method. The processed samples and the epi-layer grown samples were analyzed by XRD, AFM, OM, and Etching to compare the surface properties according to the crystal plane and off-angle.