• Journal of Satellite, Information and Communications
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• v.12 no.4
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• pp.115-119
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• 2017

Intermodulation distortion degrades the S/N(signal-to-noise) of the original signal and also affects the adjacent channels. Intermodulation distortion is mainly caused by the nonlinear characteristics of the power amplifier. If the power amplifier with nonlinear characteristics has a memory effect, the intermodulation distortions occurred in the power amplifier are generated in various and complex forms. The predistorter is used as a way to improve intermodulation distortions. In order to efficiently utilize the performance of the predistorter, the memory effect of the power amplifier must be reduced. In this paper, we describe the design method of bias circuit to reduce the memory effect in power amplifiers. To reduce the memory effect, the bias circuit must have a high impedance for the signal and a low impedance for the envelope(modulating signal) and the second harmonic component of the signal. To verify the performance of the bias circuit designed considering the memory effect, a power amplifier operating at 170 ~ 220MHz was designed and implemented. The designed bias circuit has a large impedance in the operating frequency band and low impedance in the envelope signal and the second harmonic of the signal. As a result of the performance measurement, it was found that the asymmetric intermodulation distortion component is improved by 3.7dB.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.19 no.4
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• pp.691-700
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• 1994

A power line in not so good in characteristics for communication, because it is a media to transfer the commercial electrical power, and its load noise and high frequency noise are so much. Thus, a simple method to transfer a remote control signal on the power line is studied. The already-existing method is that two signals with upper part eliminated is transmitted every N step. But the method is investigated which the transmitter sends a period signal eliminated in arbitrary phase. Thus the transmission power loss due to elimination of signal can be reduced to the minimum. To implement it, a timer calculating the time from zero-crossing point to the phase is required. The micro-controller, 87C51, precisely calculates the phase using one of two built-in timers. As a result, a remote control signal tramsmitter and receiver using a partially eliminated signal, which is better than the conventional technique using half-eliminated signal in a efficiency of power transmission, is realized, and its characteristics are analyzed.

• Journal of Internet Computing and Services
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• v.18 no.6
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• pp.15-23
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• 2017

Wireless power transmission (WPT) for wireless charging is currently attracting much attention as a promising approach to miniaturize batteries and increase the maximum total range of an electric vehicle. The main advantage of the laser power beam (LPB) approach is its high power transmission efficiency (PTE) over long distance. In this paper, we present the design of a laser power beam based WPT system, which has a best WPT channel selection technique at the receiver end when multiple power transmitters and single power receiver are operated simultaneously. The transmitters send their transmission channel information via optically modulated laser pulses. The receiver uses the received signal strength indicator and digitized data to choose an optimum power transmission path. We modeled a vertical multi-junction photovoltaic cell array, and conducted an experiment and simulation to test the feasibility of this system. From the experimental result, the standard deviation between the mathematical model and the measured values of normalized energy distribution is 0.0052. The error between the mathematical model and measured values are acceptable, thus the validity of the model is verified.

• Journal of the Optical Society of Korea
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• v.19 no.3
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• pp.255-259
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• 2015

We have proposed and experimentally verified a pulse-width modulation (PWM) generator which directly generated a PWM signal in the optical domain. Output waveforms were clear at the repetition rate of 16 MHz; the duty cycle (DC) was from 14.7% to 72.1%; and the DC-control resolution was about 4.399%/dB. The PWM generator' operation principle is based on the injection-locking property of a single-mode Fabry-$P{\acute{e}}rot$ laser diode (SMFP-LD). The SMFP-LD, which has a self-locked mode wavelength at ${\lambda}_{PWM}$, was used to detect the power of the injection-locking signal (optical analog input). If the analog input power is high, the SMFP-LD is locked to the wavelength of the input signal ${\lambda}_a$ and there is no output after an optical bandpass filter (OBF). If the analog input power is low, the SMFP-LD is unlocked and there is output signal at ${\lambda}_{PWM}$ after the OBF. Thus, the SMFP-LD plus the OBF provide digital output for an analog input. The DC of the output PWM signal can be controlled by tuning the power of the analog input.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.40 no.1
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• pp.24-36
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• 2003

The digital mobile communication will be developed till getting multimedia service in anyone, any where, any time. Theses requiring items are going to be come true via IMT-2000 system. Transmitting signal bandwidth of IMT-2000 system is 3 times as large as IS-95 system. That is mean peak to average of signal is higher than IS-95A system. So we have to design it carefully not to effect in adjacent channel. HPA(High Power Amplifier) located in the end point of system is operated in 1-㏈ compression point(Pl㏈), then it generates 3rd and 5th inter modulation signals. Theses signals affect at adjacent channel and RF signal is distorted by compressed signal which is operated near by Pl㏈ point. Then the most important design factor is how we make HPA having high linearity. Feedback, Pre-distorter and Feed-forward methods are presented to solve theses problems. Feed-forward of these methods is having excellent improving capacity, but composed with complex structure. Generally, Linearity and Efficiency in power amplifier operate in the contrary, then it is difficult for us to find optimal operating point. In this paper we applied algorithm which searches optimal point of linear characteristics, which is key in Power Amplifier, using minimum current point of error amplifier in 1st loop. And we made 2nd loop compose with new structure. We confirmed fabricated LPA is operated by having high linearity and minimum current condition with ACPR of -26 ㏈m max. @ 30㎑ BW in 3.515㎒ and ACLR of 48 ㏈c max@${\pm}$㎒ from 1W to 40W.

• Journal of Power Electronics
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• v.12 no.3
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• pp.410-417
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• 2012

In this paper, a direct current control method based on a one-cycle controller (DCOCC) for double frequency buck converters (DF buck) is proposed. This control method can make the average current through the high frequency and low frequency inductors of a DF buck converter equal. This is similar to the average current control method. However, the design of the loop compensator is much easier when compared with the average current control. Since the average current though the high frequency and low frequency inductors is equivalent, the current stress of the high frequency switches and the switch losses are minimized. Therefore, the efficiency of the DF buck converter is improved. Firstly, the operation principle of DCOCC is described, then the small signal models of a one cycle controller and a DF buck converter are presented based on the state space average method. Eventually, a system block diagram of the DCOCC controlled DF buck is established and the compensator is designed. Finally, simulation and experiment results are given to verify the correction of the theory analysis.

• Journal of electromagnetic engineering and science
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• v.2 no.2
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• pp.75-80
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• 2002

Signal integrity problems and their possible solutions are addressed in this paper for split power plane of high-speed digital systems. Stitching and decoupling capacitors are proved to be very effective for reducing signal noise, ground bounce as well as electromagnetic radiation from the split power plane. Simulations based on 3D-Finite Difference Time Domain (FDTD) method are utilized for the analysis of practical high frequency multi-layered PC main board.

• The Proceeding of the Korean Institute of Electromagnetic Engineering and Science
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• v.24 no.2
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• pp.51-57
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• 2013

The current expanding mobile markets incessantly demands small form factor, low power consumption and high aggregate throughput for silicon-level integration such as memory to logic system. One of emerging solution for meeting this high market demand is 3D through silicon stacking (TSS) technology. Main challenges to bring 3D TSS technology to the volume production level are establishing a cost effective supply chain and building a reliable manufacturing processes. In addition, this technology inherently help increase number of IOs and shorten interconnect length. With those benefits, however, potential signal and power integrity risks are also elevated; increase in PDN inductance, channel loss on substrate, crosstalk and parasitic capacitance. This paper will report recent progress of wide IO memory to high count TSV logic device assembly development work. 28 nm node TSV test vehicles were fabricated by the foundry and assembled. Successful integration of memory wide IO chip with less than a millimeter package thickness form factor was achieved. For this successful integration, we discussed potential signal and power integrity challenges. This report demonstrated functional wide IO memory to 28 nm logic device assembly using 3D package architecture with such a thin form factor.

• The Transactions of the Korean Institute of Electrical Engineers A
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• v.48 no.3
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• pp.330-335
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• 1999

Recently, there a lot of activities on the researches that implement many kinds of control system using power lines. To implement that, it is desirable to use hybrid PSK model because it takes advantage of PSK and DPSK which has a low-bit-error rate. In this parer, we implement the transmitter of this model. Because the power line is not designed for the data communication, we separated the signal generator circuit and the signal loading circuit so that minimized noises from outside. Also, to make it easy on the experiments, most of process are performed by software. As a result, transmitting a high frequency signal on the power line made no effects on the electrical devices.

• Proceedings of the KIPE Conference
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• 2007.11a
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• pp.43-46
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• 2007

In this paper, a novel new pulse power generator based on IGBT stacks is proposed for pulse power application. Proposed scheme consists of series connected 9 power stages to generate maximum 60kV output pulse and one series resonant power inverter to charge DC capacitor voltage. Each power stages are configured as 8 series connected power cells and each power cell generates up to 850VDC pulse. Finally pulse output voltage is applied using total 72 series connected IGBTs. The synchronization of gating signal is important for series operation of IGBTs. For gating signal synchronization, full bridge inverter and pulse transformer generates on-off signals of IGBT gating and specially designed gate power circuit was used. Proposed scheme has lots of advantages such as long lifecyle, compact size, flat topped pulse forming, small weight, protection for arc, high efficiency and flexibility to generate various kinds of pulse output.