• ETRI Journal
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• 제39권1호
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• pp.51-61
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• 2017

This paper demonstrates a systematic approach for the design of broadband, high efficiency, high power, Class-AB RF amplifiers with high gain flatness. It is usually difficult to simultaneously achieve a high gain flatness and high efficiency in a broadband RF power amplifier, especially in a high power design. As a result, the use of a computer-aided simulation is most often the best way to achieve these goals; however, an appropriate initial value and a systematic approach are necessary for the simulation results to rapidly converge. These objectives can be accomplished with a minimum of trial and error through the following techniques. First, signal gain variations are reduced over a wide bandwidth using a proper pre-matching network. Then, the source and load impedances are satisfactorily obtained from small-signal and load-pull simulations, respectively. Finally, two high-order Chebyshev low-pass filters are employed to provide optimum input and output impedance matching networks over a bandwidth of 100 MHz-500 MHz. By using an EM simulation for the substrate, the simulation results were observed to be in close agreement with the measured results.

• ETRI Journal
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• 제35권3호
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• pp.546-549
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• 2013

A Ka-band 6-W high power microwave monolithic integrated circuit amplifier for use in a very small aperture terminal system requiring high linearity is designed and fabricated using commercial 0.15-${\mu}m$ GaAs pHEMT technology. This three-stage amplifier, with a chip size of 22.1 $mm^2$ can achieve a saturated output power of 6 W with a 21% power-added efficiency and 15-dB small signal gain over a frequency range of 28.5 GHz to 30.5 GHz. To obtain high linearity, the amplifier employs a class-A bias and demonstrates an output third-order intercept point of greater than 43.5 dBm over the above-mentioned frequency range.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2003년도 추계학술대회 논문집
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• pp.85-89
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• 2003

Many single-stage PFC(power-facto.-correction) ACHC converters suffer from the high link voltage at high input voltage and light load condition. In this paper, to suppress the link voltage, a novel high power factor high efficiency PFC AC/DC converter is proposed using the single controller which generates two gate signals so that one of them is used far gate signal of the flyback DC/DC converter switch and the other is applied to the Boost PFC stage. A 130w prototype for LCD monitor adapter with universal input $(90-265V_{rms})$ and 19.5V 6.7A output is implemented to verify the operational principles and performances. The experimental results show that the maximum link voltage stress is about 450V at 270Vac input voltage. Moreover, efficiency and power factor are over $84\%$ and 0.95, respectively, under the full load condition.

• ETRI Journal
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• 제30권3호
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• pp.377-382
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• 2008

A novel power amplifier for a polar transmitter is proposed to achieve better spectral performance for a wideband envelope signal. In the proposed scheme, 2-bit sigma-delta (${\Sigma}{\Delta}$) modulation of the envelope signal is introduced, and the power amplifier configuration is modified in a binary form to accommodate the 2-bit digitized envelope signals. The 2-bit ${\Sigma}{\Delta}$ modulator lowers the noise of the envelope signal by fine quantization and thus enhances the spectral property of the RF signal. The Ptolemy simulation results of the proposed structure show that the spectral noise is reduced by 10 dB in a full transmit band of the EDGE system. The dynamic range is also enhanced. Since the performance is improved without increasing the over-sampling ratio, this technique is best suited for wireless communication with high data rates.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2009년도 하계학술대회 논문집
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• pp.480-481
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• 2009

In the paper we study for the ubiquitous networking based on power line communication technology with digital signal transmission. The necessity of research for using resources in the network effectively is being increase as network to use the PLC with smart grid networking. The data rate has compared with implemented modem 250Mbps in the pixel resolution and bandwidth, which has degraded with 80%. We also proposed for design of high-definition digital signal transceiver, which has used in the network between digital multimedia with PLC. Using resources in the network effectively can be also verified with this research.

• JSTS:Journal of Semiconductor Technology and Science
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• 제12권4호
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• pp.377-387
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• 2012

An intrinsic small signal equivalent circuit model of Cylindrical/Surrounded gate MOSFET is proposed. Admittance parameters of the device are extracted from circuit analysis and intrinsic circuit elements are presented in terms of real and imaginary parts of the admittance parameters. S parameters are then evaluated and justified with the simulated data extracted from 3D device simulation.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2004년도 학술대회 논문집 정보 및 제어부문
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• pp.711-713
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• 2004

In the past time, the protection relay did only a protection function. Currently, its upgraded device i.e. IED(Intelligent Electric Device) has been designed to protect, control, and monitor the whole power system automatically. Also the device is desired to successfully measure important elements of the power system. This paper considers design method of a digital protection IED with a function of measuring various elements and a communication function. The protection IED is composed of the specific function modules that are signal process module, communication module, input/output module and main control module. A signal process module use a DSP processor for analysis of input signal. Main control module use a embedded processor, Xscale, that has an ARM Core. The communication protocol uses IEC61850 protocol that becomes standard in the future. The protection IED is able to process mass information with high-performance processor. As each function module is designed individually, the reliability of the device can be enhanced.

• Journal of Electrical Engineering and Technology
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• 제12권5호
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• pp.2001-2006
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• 2017

This paper explains the effects of the weak signal of a rotating-type electric field mill sensor fabricated for measuring the intensity of the electric field generated by high-voltage direct current (HVDC) power transmission lines. The fabricated field mill consists of two isolated electrode vanes, a motor driver, and a ground part. The sensor plate is exposed to and shielded from the electric field by means of a rotary shutter consisting of a motor-driven mechanically complementary rotor/stator pair. When the uncharged sensor plate is exposed to an electric field, it becomes charged. The rotating electrode consists of several conductive vanes and is connected to the ground part, so that it is shielded. Determining the appropriate design variables such as the speed of the vane, its shape, and the distance between the two electrodes, is essential for ensuring optimal performance. By varying the speed, the weak signal characteristics which is used to signal processing and calibration experiment are quite different. Each weak signal pattern was analyzed along with the output voltage characteristics, in order to be able to determine the intensity of the electric field generated by HVDC power transmission lines with accuracy.

• 조명전기설비학회논문지
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• 제12권1호
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• pp.51-57
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• 1998

본 논문은 구동신호 위상제어 기능을 갖는 SIT고주파공진 인버터를 제안하였다. SIT를 이용한 위상제어형인버터는 낮은 스위칭 손실로서 높은 스위칭 주파수의 전력변환을 실현시킬 수 있다. 특히 2단위 인버터의 출력전압을 직렬로 연결하여 높은 출력을 얻을 수 있다. 과전류에 대해서 보호회로를 이용한 시스템의 안정성과 그리고 PLL에 의해 부하변화에 따른 자동추종제어를 실현하였다. 특히 제안된 인버터는 고주파에서도 거의 정현파에 가까우며, 스위칭 주파수 범위는 180∼220〔kHz〕이고, 2〔kW〕의 유도가열에 응용하였다. 본 인버터의 동작 특성에 대해서 이론과 실험결과를 비교 검토하였다.

• 전자공학회논문지B
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• 제33B권3호
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• pp.47-55
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• 1996

An optical transmitter, which is a key component of the optical transmission system, converts the electrical signal to optical signal and consists of a high-speed current-pulse driver for laser diode and low-speed feedback loops that stabilize optical power against aging, power supply voltage fluctuations, and ambient temperature changes. In this paper, the power-stabilizing part, which forms the bulk of the optical transmitter circuitry was designed in integrted circuits. Operational amplifiers and reference voltage generation circuits, which were identified as key building blocks for the power-stabilizing feedback loops, were designed and were subsequently verified through HSPICE simulations. The designed operational amplifier consists of a two-stage folded cascode amplifier and class AB output stage, whereas the reference voltage is obtained by bandgap reference circuits. Finally the power-stabilizing circuitry was laid out based on 3\mu$m CMOS design rules for fabrication.