• The Journal of the Acoustical Society of Korea
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• v.16 no.3E
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• pp.56-61
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• 1997

In this paper, we describe a real-time implementation of a multi-channel auido codec system that is based on the MPEG-1 audio algorithm. The major feature of this system is that it has a flexible multi-DSP system that can be adapted for various applications with using up to four TMS320C40 DSPs. The purpose of this paper is to present the problems of the system and is to describe the optimized methods to solve the problems in the view of hardware and software. Our audio codec is composed of an encoder an a decoder system and the bit rate of bitstream is up to 384 kbps. Fast input/output interfaces, DSP overloads, and inter-DSP communications methods with high speed are considered in multi-DSP H/W. Also, to run real-time in S/W, optimizing methods of algorithm are considered. After implementation of system, the subjective assessment method, and 'triple stimulus/hidden reference/double blind' that recommended by ITU-R TG10/3 is adopted for the quality of our system. All test items except one are awarded difference grades(diffgrade) better than 1-. Form the results, multi-channel audio system can be used for HDTV service.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 1992.04a
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• pp.354-358
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• 1992

This paper describes a development of high speed fuzzy inference circuit for the industrialprocesses. The hardware fuzzy inference circuit is developed utilizing a hardware fuzzy inference circuit is developed utilizing a DSP and a multiplier and accumulator chip. To enhance the inference speed, the pipeline disign is adopted at the bottleneck and the general Max-Min inference method is slightly modified as Max-max method. As a results, the inference speed is evaluated to be 100 KFLIPS. Owing to this high speed feature, satisfactory application can be attained for complex high speed motion control as well as the control of multi-input multi-output nonlinear system. As an application, the developed fuzzy inference circuit is embedded to a PLC (Porgrammable Logic Controller) for industrial process control. For the fuzzy PLC system, to fascilitate the design of the fuzzy control knowledge such as membership functions, rules, etc., a MS-Windows based GUI (Graphical User Interface) software is developed.

• The Transactions of the Korean Institute of Electrical Engineers A
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• v.52 no.11
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• pp.647-654
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• 2003

As electrical power system has become complicated and enlarged to cope with the increasing electric demand, it has to be expected that higher speed, higher reliability, higher function and higher arithmetic ability in protective relay should be realized. Therefore, in this papers, by hardware design and implementation used DMA controller that transfer blocks of data to any location in the memory map without interfering with CPU operation, CPU utilization is increased effectively, as a result it made possible to implement multi-function digital protective relay which has high trust and high function of protection as well as control and metering for power transformers using single processor(DSP).

• Journal of Electrical Engineering and Technology
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• v.3 no.3
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• pp.430-435
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• 2008

In the paper, an algorithm called a Constraint algorithm is proposed to solve the fan-in problem occurred in ADC encoding circuits. The Flash ADC architecture uses a double-base number system (DBNS). The DBNS has known to represent the multi-dimensional logarithmic number system (MDLNS) used for implementing the multiplier accumulator architecture of FIR filter in digital signal processing (DSP) applications. The authors use the DBNS with the base 2 and 3 to represent binary output of ADC. A symmetric map is analyzed first, and then asymmetric map is followed to provide addition read DBNS to DSP circuitry. The simulation results are shown for the Double-Base Integer Encoder (DBIE) of the 6-bit ADC to demonstrate an effectiveness of the Constraint algorithm, using $0.18{\mu}\;m$ CMOS technology. The DBIE’s processing speed of the ADC is fast compared to the FAT tree encoder circuit by 0.95 GHz.

• Proceedings of the KIEE Conference
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• 2006.07b
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• pp.887-888
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• 2006

Switched Reluctance Motor(SRM) is rotated by reluctance force generated between rotor pole and stator pole. So SRM must be switched by exciting current according to rotor position. but SRM takes the advantages of high speed driving and very simple structure. The single phase SRM can not be start by itself and torque ripple is generated more than multi-phase SRM. But mechanical structure and driver is simpler than multi-phase SRM. The single phase SRM driver is composed with the absolute encoder and DSP to control exciting section and current, and is supplied by constant voltage. So The paper is intend to measure the speed charactrer of double silent pole type SRM by using the unipolar driving curcuit.

• Transactions of the Korean Society of Mechanical Engineers A
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• v.41 no.11
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• pp.1109-1117
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• 2017

In this work, a new control module and communication system associated with DSP are proposed to overcome the limitations of the contemporary prevailing PLC-based industrial equipment controller, and the performance of the proposed system was experimentally verified. In the light of this issue, a communication conversion scheme from RS-485 to Modbus, the dominant communication protocol used by PLC, was developed and shown to yield enhanced compatibility between devices. The proposed system allows for ~50％ cost reduction as well as downsizing of the industrial controllers. Furthermore, the design includes 24 V general digital I/O pins, which facilitate partial expansion of inputs and outputs. With Modbus communication implemented in DSP with the RS-485 interface, multi-to-multi communication may also be achieved.

• Journal of Industrial Technology
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• v.27 no.A
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• pp.169-175
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• 2007

In High-Speed DSP systems, crosstalk between transmission lines of multi-channel can degrade the performance of equipment operations. This paper presents a microwave board to measure multi-channel coaxial cable assembly. The designed board has good performances from DC to 3 GHz, which have improved characteristic impedance, reduced crosstalk by using via fence, and low transmission loss. Using the designed board, we can measure characteristics of DUT(Device Under Test) such as return loss, insertion loss, crosstalk phase delay, and characteristic impedance. The measured results are used to improve performances of a produced coaxial cable assembly.

• Investigative Magnetic Resonance Imaging
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• v.7 no.1
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• pp.12-21
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• 2003

Purpose : In order to overcome limitations in the existing conventional spectrometer, a new spectrometer with advanced functionalities is designed and implemented. Materials and Methods : We designed a spectrometer using the TMS320C6701 DSP capable of 1 giga floating point operations per second (GFLOPS). The spectrometer can generate continuously varying complicate gradient waveforms by real-time calculation, and select image plane interactively. The designed spectrometer is composed of two parts: one is DSP-based digital control part, and the other is analog part generating gradient and RF waveforms, and performing demodulation of the received RF signal. Each recover board can measure 4 channel FID signals simultaneously for parallel imaging, and provides fast reconstruction using the high speed DSP. Results : The developed spectrometer was installed on a 1.5 Tesla whole body MRI system, and performance was tested by various methods. The accurate phase control required in digital modulation and demodulation was tested, and multi-channel acquisition was examined with phase-array coil imaging. Superior image quality is obtained by the developed spectrometer compared to existing commercial spectrometer especially in the fast spin echo images. Conclusion : Interactive control of the selection planes and real-time generation of gradient waveforms are important functions required for advanced imaging such as spiral scan cardiac imaging. Multi-channel acquisition is also highly demanding for parallel imaging. In this paper a spectrometer having such functionalities is designed and developed using the TMS320C6701 DSP having 1 GFLOPS computational power. Accurate phase control was achieved by the digital modulation and demodulation techniques. Superior image qualities are obtained by the developed spectrometer for various imaging techniques including FSE, GE, and angiography compared to those obtained by the existing commercial spectrometer.

• The Journal of the Acoustical Society of Korea
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• v.14 no.2E
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• pp.91-97
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• 1995

This paper describes the implementation of a multi-channel audio codec for HETV. This codec has the features of the 3/2-stereo plus low frequency enhancement, downward compatibility with the smaller number of channels, backward compatibility with the existing 2/0-stereo system(MPEG-1 audio), and multilingual capability. The encoder of this codec consists of 6-channel analog audio input part with the sampling rate of 48 kHz, 4-channel digital audio input part and three TMS320C40 /DSPs. The encoder implements multi-channel audio compression using a human perceptual psychoacoustic model, and has the bit rate reduction to 384 kbit/s without impairment of subjective quality. The decoder consists of 6-channel analog audio output part, 4-channel digital audio output part, and two TMS320C40 DSPs for a decoding procedure. The decoder analyzes the bit stream received with bit rate of 384 kbit/s from the encoder and reproduces the multi-channel audio signals for analog and digital outputs. The multi-processing of this audio codec using multiple DSPs is ensured by high speed transfer of date between DSPs through coordinating communication port activities with DMA coprocessors. Finally, some technical considerations are suggested to realize the problem of real-time operation, which are found out through the implementation of this codec using the MPEG-2 layer II sudio coding algorithm and the use of the hardware architecture with commercial multiple DSPs.

• Journal of the Korean Institute of Telematics and Electronics
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• v.26 no.6
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• pp.147-155
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• 1989

In this paper, a real-time implementation of the TWS(track-while-scan) system using the high-speed DSP (digital signal processor) TMS320C25 is described. First, attempts have been made to investigate the FWL (finite word length) effect, which is caused by employing a fixed point arithmetic, of implementing the Kalman filter. The real-time TWS system consists of TWS arithmetic unit, scan converter, and system controller. In addition, the TWS system is in tegrated in the Multi-Bus. In experiment, it is observed that by employing the floating point arithmetic the computation time of 0.35sec is required for tracking 8 targets simultaneously, while 0.28sec is required for the fixed point arithmetic. Since the TWS system is designed to track up to 8 targets simultaneously, we conclude that the system is enough to process Kalman filter in a real-time.