• Proceedings of the Korean Vacuum Society Conference
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• 2012.08a
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• pp.189-189
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• 2012

Lead sulfide (PbS) nanocrystal quantum dots (NQDs) are promising materials for various optoelectronic devices, especially solar cells, because of their tunability of the optical band-gap controlled by adjusting the diameter of NQDs. PbS is a IV-VI semiconductor enabling infrared-absorption and it can be synthesized using solution process methods. A wide choice of the diameter of PbS NQDs is also a benefit to achieve the quantum confinement regime due to its large Bohr exciton radius (20 nm). To exploit these desirable properties, many research groups have intensively studied to apply for the photovoltaic devices. There are several essential requirements to fabricate the efficient NQDs-based solar cell. First of all, highly confined PbS QDs should be synthesized resulting in a narrow peak with a small full width-half maximum value at the first exciton transition observed in UV-Vis absorbance and photoluminescence spectra. In other words, the size-uniformity of NQDs ought to secure under 5%. Second, PbS NQDs should be assembled carefully in order to enhance the electronic coupling between adjacent NQDs by controlling the inter-QDs distance. Finally, appropriate structure for the photovoltaic device is the key issue to extract the photo-generated carriers from light-absorbing layer in solar cell. In this step, workfunction and Fermi energy difference could be precisely considered for Schottky and hetero junction device, respectively. In this presentation, we introduce the strategy to obtain high performance solar cell fabricated using PbS NQDs below the size of the Bohr radius. The PbS NQDs with various diameters were synthesized using methods established by Hines with a few modifications. PbS NQDs solids were assembled using layer-by-layer spin-coating method. Subsequent ligand-exchange was carried out using 1,2-ethanedithiol (EDT) to reduce inter-NQDs distance. Finally, Schottky junction solar cells were fabricated on ITO-coated glass and 150 nm-thick Al was deposited on the top of PbS NQDs solids as a top electrode using thermal evaporation technique. To evaluate the solar cell performance, current-voltage (I-V) measurement were performed under AM 1.5G solar spectrum at 1 sun intensity. As a result, we could achieve the power conversion efficiency of 3.33% at Schottky junction solar cell. This result indicates that high performance solar cell is successfully fabricated by optimizing the all steps as mentioned above in this work.

• Journal of IKEEE
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• v.22 no.1
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• pp.180-184
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• 2018

Gallium oxide ($Ga_2O_3$) and silicon carbide (SiC) are the material with the wide band gap ($Ga_2O_3-4.8{\sim}4.9eV$, SiC-3.3 eV). These electronic properties allow high blocking voltage. In this work, we investigated the characteristic of $Ga_2O_3$ and 4H-SiC vertical depletion-mode metal-oxide-semiconductor field-effect transistors. We demonstrated that the blocking voltage and on-resistance of vertical DMOSFET is dependent with structure. The structure of $Ga_2O_3$ and 4H-SiC vertical DMOSFET was designed by using a 2-dimensional device simulation (ATLAS, Silvaco Inc.). As a result, 4H-SiC and $Ga_2O_3$ vertical DMOSFET have similar blocking voltage ($Ga_2O_3-1380V$, SiC-1420 V) and then when gate voltage is low, $Ga_2O_3-DMOSFET$ has lower on-resistance than 4H-SiC-DMOSFET, however, when gate voltage is high, 4H-SiC-DMOSFET has lower on-resistance than $Ga_2O_3-DMOSFET$. Therefore, we concluded that the material of power device should be considered by the gate voltage.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.19 no.4
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• pp.650-656
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• 2018

The TFT-LCD industry is a kind of large-scale industrial Giant Microelectronics device industry and has a similar semiconductor process technology. Wet etching forms a relatively large proportion of the entire TFT process, but the number of published research papers on this topic is limited. The main reason for this is that the components of the etchant, in which the reaction takes place, are confidential and rarely publicized. Aluminum (Al) and copper (Cu), which have been used in recent years for the manufacture of large area LCDs, are very difficult materials to process using wet etching. Cu, a low-resistance material, can only be used in the wet etching process, and is used as a substitute for Al due to its high speed etching, low failure rate, and low power consumption. Further, the abnormal reaction of hydrogen peroxide ($H_2O_2$), which is used as an etching solution, requires additional piping and electrical safety devices. This paper proposes a method of minimizing the damage to the plant in the case of adverse reactions, though it cannot limit the adverse reaction of hydrogen peroxide. In recent years, there have been many cases in which aluminum etching equipment has been changed to copper. This paper presents a countermeasure against abnormal reactions by implementing safety PLC with a high safety grade.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.39 no.5
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• pp.23-30
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• 2002

The PVDF (Polyvinylidene Fluoride) thin film having P phase is prepared by the vacuum deposition with applying the electric field and its pyroelectric properties are studied by using a dynamic method to examine the possibility of the application to the pyroelectric IR sensor. The pyroelectric responses of the PVDF thin film are characterized as the frequency dispersion in both low and high modulation frequency regions, and their frequency dependences are observed. In the low frequency region (2~10Hzz), the polarization can easily rotate with the increase of modulation frequency and show the maximum since the reorientation rate of domains is higher than the modulation frequency. On the other hand, in the high frequency region (100~1000Hz), the pyroelectric response decreases as the frequency increases, because the reorienatation rate of domains is suppressed and thus, the change of polarization decreases. Pyroelectric coefficient, figure of merits for noise equivalent power and detectivity of the PVDF thin film are measured as 3.2$\times$10$^{-10}$ C/$\textrm{cm}^2$.K, 2.34$\times$10$^{-10}$ C.cm/J and 1.32$\times$10$^{-9}$ C.cm/J, respectively. Also, the noise equivalent and the detectivity are 1.66$\times$10$^{-7}$ W/H $z^{$\sfrac{1}{2}$}$, 6.03$\times$10$^{5}$ cm.H $z^{$\sfrac{1}{2}$}$W, respectively.

• Applied Chemistry for Engineering
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• v.29 no.1
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• pp.10-17
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• 2018

POU (point of use) scrubbers were applied for the treatment of waste gases including PFCs (perfluorocompounds) exhausted from the CVD (chemical vapor deposition), etching, and cleaning processes of semiconductor and display manufacturing plant. The GWP (global warming potential) and atmosphere lifetime of PFCs are known to be a few thousands higher than that of $CO_2$, and extremely high temperature more than 3,000 K is required to thermally decompose PFCs. Therefore, POU gas scrubbers based on the thermal plasma technology were developed for the effective control of PFCs and industrial application of the technology. The thermal plasma technology encompasses the generation of powerful plasma via the optimization of the plasma torch, a highly stable power supply, and the matching technique between two components. In addition, the effective mixture of the high temperature plasma and waste gases was also necessary for the highly efficient abatement of PFCs. The purpose of this paper was to provide not only a useful technical information of the post-treatment process for the waste gas scrubbing but also a short perspective on R&D of POU plasma gas scrubbers.

• Journal of IKEEE
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• v.11 no.4
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• pp.152-157
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• 2007

AlGaN/GaN high electron mobility transistors (HEMTs) were fabricated and the effect of ${N_2}O$ plasma on the electrical characteristics of the devices was investigated. The HEMT exposed to ${N_2}O$ plasma formed by 40 W of RF power in a chamber with pressure of 20 mTorr at a temperature of $200^{\circ}C$, exhibited a reduction of gate leakage current from 246 nA to 1.2 pA by 10 seconds treatment. The current between the two isolated active regions reduced from 3 uA to 7 nA and the sheet resistance of the active layer was lowered also. The variations of electrical characteristics for HEMT were occurred within a short time expose of 10 seconds and the successive expose did not influence on the improvements of gate leakage characteristics and conductivity of the active region. The reduced leakage current level was not varied by successive $SiO_2$ deposition and its removal. The transconductnace and drain current of AlGaN/GaN HEMTs were increased also by the expose to the ${N_2}O$ plasma.

• Korean Journal of Materials Research
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• v.30 no.10
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• pp.509-514
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• 2020

The two key variables of an Si solar cell, i.e., emitter (n-type window layer) and base (p-type substrate) doping levels or concentrations, are studied using Medici, a 2-dimensional semiconductor device simulation tool. The substrate is p-type and 150 ㎛ thick, the pn junction is 2 ㎛ from the front surface, and the cell is lit on the front surface. The doping concentration ranges from 1 × 10¹⁰ cm^-3 to 1 × 10²⁰ cm^-3 for both emitter and base, resulting in a matrix of 11 by 11 or a total of 121 data points. With respect to increasing donor concentration (Nd) in the emitter, the open-circuit voltage (Voc) is little affected throughout, and the short-circuit current (Isc) is affected only at a very high levels of Nd, exceeding 1 × 10¹⁹ cm^-3, dropping abruptly by about 12%, i.e., from Isc = 6.05 × 10^-9 A·㎛^-1, at Nd = 1 × 10¹⁹ cm^-3 to Isc = 5.35 × 10^-9 A·㎛^-1 at Nd = 1 × 10²⁰ cm^-3, likely due to minority-carrier, or hole, recombination at the very high doping level. With respect to increasing acceptor concentration (Na) in the base, Isc is little affected throughout, but Voc increases steadily, i.e, from Voc = 0.29 V at Na = 1 × 10¹² cm^-3 to 0.69 V at Na = 1 × 10¹⁸ cm^-3. On average, with an order increase in Na, Voc increases by about 0.07 V, likely due to narrowing of the depletion layer and lowering of the carrier recombination at the pn junction. At the maximum output power (Pmax), a peak value of 3.25 × 10^-2 W·cm^-2 or 32.5 mW·cm^-2 is observed at the doping combination of Nd = 1 × 10¹⁹ cm^-3, a level at which Si is degenerate (being metal-like), and Na = 1 × 10¹⁷ cm^-3, and minimum values of near zero are observed at very low levels of Nd ≤ 1 × 10¹³ cm^-3. This wide variation in Pmax, even within a given kind of solar cell, indicates that selecting an optimal combination of donor and acceptor doping concentrations is likely most important in solar cell engineering.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.37 no.8
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• pp.28-34
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• 2000

Pyroelectric properties of the $Pb(Zr_{0.9}Ti_{0.1})O_3$ ceramics having the rhombohedral structure have been studied by using the dynamic measurement method. The pyroelectric responses of the $Pb(Zr_{0.9}Ti_{0.1})O_3$ ceramics are characterized in both low and high medulation frequency regions and their frequency depences are observed. In the low frequency region (2~200Hz), the change of polarization increases and shows the maximum since the reorientation rate of domains is higher than the modulation frequency. Inthe high frequency region (200~2000Hz), the pyroelectrci response decreases as the frequency increases, because the reorientation of domains is suppressed and so the change of polarization decreases. Pyroelectric coefficient, figure of merit, noise equivalent power and detectivity of the $Pb(Zr_{0.9}Ti_{0.1})O_3$ ceramics are measured as $1.6{\times}10^{-8}C/cm^2{\cdot},\;1.6{\times}10^{-11}C{\cdot}cm/J,\;2.4{\times}10^{-7}W/Hz^{1/2}\;and\;4.17{\times}10^6cm{\cdot}Hz^{1/2}/W$, respectively.

• Proceedings of the Korean Vacuum Society Conference
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• 2010.02a
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• pp.121-121
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• 2010

ZnO is a promising material for the application of high efficiency light emitting diodes with short wavelength region for its large bandgap energy of 3.37 eV which is similar to GaN (3.39 eV) at room temperature. The large exciton binding energy of 60 meV in ZnO provide provides higher efficiency of emission for optoelectronic device applications. Several ZnO/ZnMgO multiple quantum well (MQW) structures have been grown on various substrates such as sapphire, GaN, Si, and so on. However, the achievement of high quality ZnO/ZnMgO MQW structures has been somehow limited by the use of lattice-mismatched substrates. Therefore, we propose the optical properties of ZnO/ZnMgO multiple quantum well (MQW) structures with different well widths grown on lattice-matched ZnO substrates by molecular beam epitaxy. Photoluminescence (PL) spectra show MQW emissions at 3.387 and 3.369 eV for the ZnO/ZnMgO MQW samples with well widths of 2 and 5 nm, respectively, due to the quantum confinement effect. Time-resolved PL results show an efficient photo-generated carrier transfer from the barrier to the MQWs, which leads to an increased intensity ratio of the well to barrier emissions for the ZnO/ZnMgO MQW sample with the wider width. From the power-dependent PL spectra, we observed no PL peak shift of MQW emission in both samples, indicating a negligible built-in electric field effect in the ZnO/$Zn_{0.9}Mg_{0.1}O$ MQWs grown on lattice-matched ZnO substrates.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.48 no.5
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• pp.25-33
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• 2011

This work proposes a skinny-type 10b 50MS/s 0.13um CMOS three-step pipeline ADC for CIS applications. Analog circuits for CIS applications commonly employ a high supply voltage to acquire a sufficiently acceptable dynamic range, while digital circuits use a low supply voltage to minimize power consumption. The proposed ADC converts analog signals in a wide-swing range to low voltage-based digital data using both of the two supply voltages. An op-amp sharing technique employed in residue amplifiers properly controls currents depending on the amplification mode of each pipeline stage, optimizes the performance of op-amps, and improves the power efficiency. In three FLASH ADCs, the number of input stages are reduced in half by the interpolation technique while each comparator consists of only a latch with low kick-back noise based on pull-down switches to separate the input nodes and output nodes. Reference circuits achieve a required settling time only with on-chip low-power drivers and digital correction logic has two kinds of level shifter depending on signal-voltage levels to be processed. The prototype ADC in a 0.13um CMOS to support 0.35um thick-gate-oxide transistors demonstrates the measured DNL and INL within 0.42LSB and 1.19LSB, respectively. The ADC shows a maximum SNDR of 55.4dB and a maximum SFDR of 68.7dB at 50MS/s, respectively. The ADC with an active die area of 0.53$mm^2$ consumes 15.6mW at 50MS/s with an analog voltage of 2.0V and two digital voltages of 2.8V ($=D_H$) and 1.2V ($=D_L$).