• 대한전기학회논문지:전기물성ㆍ응용부문C
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• 제52권10호
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• pp.451-457
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• 2003

The silicon wafer is stable status at room temperature, but it is weak at high temperatures which is necessary for it to be fabricated into a power semiconductor device. During thermal diffusion processing, a high temperature produces a variety thermal stress to the wafer, resulting in device failure mode which can cause unwanted oxide charge or some defect. This disrupts the silicon crystal structure and permanently degrades the electrical and physical characteristics of the wafer. In this paper, the electrical characteristics of a single oxide layer due to high temperature diffusion process, wafer resistivity and thickness of polyback was researched. The oxide quality was examined through capacitance-voltage characteristics, defect density and BMD(Bulk Micro Defect) density. It will describe the capacitance-voltage characteristics of the single oxide layer by semiconductor process and device simulation.

• JSTS:Journal of Semiconductor Technology and Science
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• 제6권3호
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• pp.189-198
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• 2006

A new analytical model has been proposed for predicting the sheet carrier density of Metal insulator Semiconductor High Electron Mobility Transistor (MISHEMT). The model takes into account the non-linear relationship between sheet carrier density and quasi Fermi energy level to consider the quantum effects and to validate it from subthreshold region to high conduction region. Then model has been formulated in such a way that it is applicable to MESFET/HEMT/MISFET with few adjustable parameters. The model can also be used to evaluate the characteristics for different gate insulator geometries like T-gate etc. The model has been extended to forecast the drain current, conductance and high frequency performance. The results so obtained from the analysis show excellent agreement with previous models and simulated results that proves the validity of our model.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2010년도 하계학술대회 논문집
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• pp.14-14
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• 2010

A high voltage current sensing circuit for LED driver IC is designed and verfied by Cadence SPECTRE simulations. The current mirror pair, power and sensing MOSFETs with size ratio of K, is used in our on-chip current sensing circuit. Very low drain voltages of the current mirror pair should be matched to give accurate current sensing, so a folded-cascode opamp with a PMOS input pair is used in our design. A high voltage high side LDMOST switch is used between the current sensing circuit and power MOSFET to protect the current sensing circuit from the high output voltage. Simulation results using 0.35um BCD process show that current sensing is accurate with properly frequency compensated opamp.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2002년도 전력전자학술대회 논문집
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• pp.589-592
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• 2002

The CCM (Continuous Conduction Mode) boost topology is generally used in the PFC (Power Factor Correction) regulator of household air-conditioning systems. There are three kinds of power devices-bridge rectifier diodes, FRDs (Fast Recovery Diodes), and IGBTs (or MOSFETs) - used In a boost PFC regulator. Selecting the appropriate device is very cumbersome work, specially, in the case of FRDs and IGBTs, because there are several considerations as described below: 1) High frequency leakage current regulation (conducted and radiated EMI regulation) 2) Power losses and thermal design 3) Device cost. It should be noted that there are trade-offs between the power loss characteristic of 2) and the other characteristics of 1) and 3). This paper presents a detailed evaluation by using several types of power devices, which can be unintentionally used, to show that optimal selection can be achieved. Based on the given thermal resistances, thermal analysis and design procedures are also described from a practical viewpoint.

• 대한전기학회논문지
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• 제41권9호
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• pp.1013-1020
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• 1992

The conductivity variation of a high resistivity bulk silicon semiconductor, whose electrodes were deposited with aluminum vapor, was studied experimentally by measuring the X-ray intensity and current flow, which was developed by X-ray radiation while applying a pulse voltage to the silicon, in a load resistor connected to the semiconductor. The current flow observed immediately as the X-ray radiated, and when the X-ray decreased. It was found from the observation of switching current for the X-ray intensity and the voltage applied in the semiconductor that the switching current of the semiconductor increased as the intensity of the X-ray and the applied voltage increased. In case of lower applied voltage, the switching current for higher applied voltage depended on the intensity of the X-ray radiated due to the saturation of electron and hole.

• 전자공학회지
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• 제37권8호
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• pp.50-59
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• 2010

$0.18-{\mu}m$ high voltage technology 13.5V high voltage well-based symmetric EDMOS isolated by MTI was designed and fabricated. Using calibrated process and device model parameters, the characteristics of the symmetric and asymmetric EDMOS have been simulated. The asymmetric EDMOS has higher performance, better $R_{sp}$ / BVDSS figure-of-merit, short-channel immunity and smaller pitch size than the symmetric EDMOS. The asymmetric EDMOST is a good candidate for low-power and smaller source driver chips. The low voltage logic well-based EDMOS process has advantages over high voltage well-based EDMOS in process cost by eliminating the process steps of high-voltage well/drift implant, high-temperature long-time thermal steps, etc. The specific on-resistance of our well-designed logic well-based EDMOSTs is compatible with the smallest one published. TCAD simulation and measurement results show that the improved logic well-based nEDMOS has better electrical characteristics than those of the conventional one. The improved EDMOS proposed in this paper is an excellent candidate to be integrated with low voltage logic devices for high-performance low-power low-cost chips.

• 공학기술논문지
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• 제10권2호
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• pp.203-208
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• 2017

Due to global climate change issues, there is a growing demand for systems throughout the industry. In the case of power conversion, studies have been actively conducted to change the structure of the power conversion circuit and to apply new power devices. In particular, the WBG (Wide Band Gap), which is newly emerged device in the market for developing semiconductor technology, has demonstrated advantages in applying for various aspects in comparison to the existing Si (Silicon) Semiconductor. Recent research centers in the railway industry are focusing on developing technologies suitable for railway vehicles by utilizing these new developments in railway countries such as Japan and Europe. This paper researches the WBG device that is applicable to the auxiliary power supplies (APS) in railway system, and analyzes the downsizing effects to APS in high-speed railway by conducting a theoretical analysis and simulation.

• 반도체디스플레이기술학회지
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• 제23권2호
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• pp.100-106
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• 2024

To generate the plasma required in dry cleaning processes, the plasma chamber must be supplied with a high-quality AC voltage with a voltage of more than 1 kV and a frequency of 400 kHz. In the existing research, many methods to supply high power have been studied, but how to improve the quality of the power for high-quality plasma has been relatively little studied. In this paper, we propose a study to improve the quality of RF power circuit for high-quality plasma generation in dry cleaning method. Existing methods in the environment of full-bridge-based RF power circuits must perform PWM duty control in the light load region. This causes distortions in the waveform, resulting in poor power quality, which directly leads to poor plasma quality. To solve these problems, a half-bridge switching method is proposed and the improvement in waveform quality is verified. To verify the feasibility of the design and control algorithm proposed in this paper, an RF power circuit prototype is fabricated and the proposed design and control method is verified through simulation and actual experiments under dummy load.

• 마이크로전자및패키징학회지
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• 제30권1호
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• pp.1-16
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• 2023

전기차용 전력변환모듈의 성능향상 요구와 종래의 Si 전력반도체의 한계 극복을 위해 차세대 전력반도체인 wide-bandgap (WBG) 기반 전력반도체로의 전환이 가속화되고 있다. WBG 전력반도체로의 전환을 위해 전력변환모듈 패키징 소재 역시 높은 고온 내구성을 요구받고 있다. 전력변환모듈 패키징 공정 중 하나인 Ag 소결 다이접합 기술은 종래의 고온용 Pb 솔더링의 대체 기술로 주목받고 있다. 본 논문에서는 Ag 소결 다이접합 기술 관련 최신 연구동향에 대해 소개하고자 한다. 소결 다이접합 공정 조건에 따른 접합부 특성을 비교하고 Ag 소결층의 3차원 이미지 구현에 따른 다공성 Ag 소결 접합부의 물성 측정 방법론에 대해 고찰하였다. 또한 열충격 및 파워사이클 신뢰성 평가 연구동향을 분석하였다.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2008년도 하계종합학술대회
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• pp.585-586
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• 2008

In this paper, a novel beta-multiplier reference current source circuit for the 800mV power-supply voltage is presented. In order to cope with the narrow input common-mode range of the OpAmp in the reference circuit, shunt resistive voltage divider branches were deployed. High gain OpAmp was designed to compensate intrinsic low output resistance of the MOS transistors. The proposed reference circuit was designed in a standard 0.18um CMOS process with nominal Vth of 420mV and -450mV for nMOS and pMOS transistor respectively. The total power consumption including OpAmp is less than 50uW.