• 한국정보디스플레이학회:학술대회논문집
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• 2006.08a
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• pp.647-650
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• 2006

Low temperature polycrystalline silicon (LTPS) technology using a high power laser have been widely applied to thin film transistors (TFTs) for liquid crystal, organic light emitting diode (OLED) display, driver circuit for system on glass (SOG) and static random access memory (SRAM). Recently, the semiconductor industry is continuing its quest to create even more powerful CPU and memory chips. This requires increasing of individual device speed through the continual reduction of the minimum size of device features and increasing of device density on the chip. Moreover, the flat panel display industry also need to be brighter, with richer more vivid color, wider viewing angle, have faster video capability and be more durable at lower cost. Kornic Systems Co., Ltd. developed the $KORONA^{TM}$ LTP/GLTP series - an innovative production tool for fabricating flat panel displays and semiconductor devices - to meet these growing market demands and advance the volume production capabilities of flat panel displays and semiconductor industry. The $KORONA^{TM}\;LTP/GLTP$ series using DPSS laser and XeCl excimer laser is designed for the new generation of the wafer & FPD glass annealing processing equipment combining advanced low temperature poly-silicon (LTPS) crystallization technology and object-oriented software architecture with a semistandard graphical user interface (GUI). These leading edge systems show the superior annealing ability to the conventional other method. The $KORONA^{TM}\;LTP/GLTP$ series provides technical and economical benefits of advanced annealing solution to semiconductor and FPD production performance with an exceptional level of productivity. High throughput, low cost of ownership and optimized system efficiency brings the highest yield and lowest cost per wafer/glass on the annealing market.

• Journal of the Semiconductor & Display Technology
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• v.18 no.1
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• pp.59-64
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• 2019

Recently, time synchronous has become important for satellite launch control facilities, multiple thermal power plants, and power system facilities. Information from time synchronous at each of these industrial sites requires time synchronization to control or monitor the system with correlation. In this paper, IRIG-B codes, which can be used for time synchronous, are used as specifications in IRIG standard 200-16. Signals from IRIG-B120 (Analog), IRIG-B000 (Digital), and one PPS are output from GPS receiver. Using the signal from IRIG-B120 (Analog), it passes through the signal from the analog amplifier and generates one PPS signal using the field-programmable gate array. The FPGA is used cyclone EPM570T100I5N. According to IEEE regulations, the error of one PPS is specified within 1us, but in this paper, the error is within 100ns. The output of the one PPS signal was then compared and tested against the one PPS signal on the GPS receiver to verify accuracy and reliability. In addition, the proposed time synchronous is simple to construct and structure, easy to implement, and provides high time precision compared to typical time synchronous. The output of the one PPS signals and IRIG-B000 signal will be used in many industry sectors.

• Proceedings of the KIEE Conference
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• 2005.07b
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• pp.1521-1523
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• 2005

High voltage plasma power supply was adopted to control polluted gases and an ozone generation. Bidirectional pulse power supply consisted of power semiconductor switch devices, a high voltage transformer, and a control board adapted switching method. Plasma power supply with sinusoidal bidirectional pulse, which has output voltage range of 0-20kV and output frequency range of 1kHz-20kHz, is realized. Using proposed system, pulsed high voltage/high frequency discharges were tested in a DBD(dielectric barrier discharge) reactor, and the spatial distribution of a glow discharge was observed. The system showed stable operational characteristics, even though the voltage and the frequency increased. Above features were verified by experiments.

• JSTS:Journal of Semiconductor Technology and Science
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• v.3 no.1
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• pp.21-26
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• 2003

4H-SiC Schottky rectifiers were exposed to pure Ar discharges in a planar coil Inductively Coupled Plasma system, as a function of source power, of chuck power and process pressure. The reverse breakdown voltage ($V_B$) decreased as a result of plasma exposure due to the creation of surface defects associated with the ion bombardment. The magnitude of the decrease was a function of both ion flux and ion energy. The forward turn-on voltage ($V_F$), on-state resistance ($R_{ON}$) and diode ideality factor (n) all increased after plasma exposure. The changes in all of the rectifier parameters were minimized at low power, high pressure plasma conditions.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2004.07a
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• pp.48-51
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• 2004

In this paper the importance of re-nitridation on a plasma-enhanced chemical-vapor deposited(PECVD) $SiO_2$ stacked on a thermally grown thin-nitrided $SiO_2$ on n-type 4H SiC have been investigated. Without the final re-nitridation process, the leakage current of metaloxidesemiconductor(MOS) was extremely large. It is believed that water and carbon, contamination from the low-thermal budget PECVD process, are the main factors that destroyed the high quality thin-buffer nitrided oxide. After re-nitridation annealing, the quality of the stacked gate oxide was improved. The reasons of this improvement are presented.

• Proceedings of the IEEK Conference
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• 2002.07a
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• pp.74-77
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• 2002

In this paper we present a novel temperature compensated Hall effect power IC for accurate operation of wide temperature and high current drive of the motor coil. In order to compensate the temperature dependence of Hall sensitivity with negative temperature coefficient(TC), the differential amplifier has the gain consisted of epi-layer resistor with positive TC. The material of Hall device and epi-resistor is epi-layer with the same mobility. The variation of Hall sensitivity is -38% at 150$^{\circ}C$ and 88% at - 40$^{\circ}C$. But the operating point(B$\sub$op/) and release point(B$\sub$RP/) of the Hall power IC are within ${\pm}$25%. The experimental results show very stable and accurate performance over wide temperature range of -40$^{\circ}C$ to 125$^{\circ}C$.

• Proceedings of the KIEE Conference
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• 2001.11c
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• pp.34-37
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• 2001

In this paper, we designed and implemented the 60W DC characteristic measurement system for semiconductor devices. The proposed system is composed of 2 SMU(Source and Measure Unit)s, 2 HPU(High power Unit)s, 2VSU(Voltage Source Unit)s, and 2 VMU(Voltage Measurement Unit)s. HPU can source/measure voltage from -200V to 200V and source/measure current from -3A to 3A within 60W. Experimental results show that the implemented system can measure the power devices such as power BJT, regulator IC, and voltage detector.

• Proceedings of the KIEE Conference
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• 1995.11a
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• pp.370-372
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• 1995

This paper mainly, describes the electrical characteristics caused by the change of structure in solid state of specimen by electron beam irradiation of high temperature-low expension type molding materials of power semiconductor element. The experiments on physical properties and electrical characteristics for the specimen irradiated electron beam are carried ont. For the investigation on physical properties, XRD analysis is used. And for the experiment of electrical characteristics, measurement of volumn resistivity is used.

• Electrical & Electronic Materials
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• v.9 no.9
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• pp.969-977
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• 1996

본고에서는 여러가지 Wide Band-gap중에서 특히 최근에 많은 관심을 끌고 있는 GaN와 4H-SiC, 6H0SiC의 전자기적 물성을 소개하고 현재 이들로부터 제작된 prototype소자들의 성능을 비교함으로써 그 발전현황을 알아보기로 한다. 본고에서 관심을 두는 소자분야는 광전소자(optoelectronic devices)라기보다는 고주파 고출력용 전력소자임을 밝힌다. 아울러 GaN로부터 제작된 MESFET(MEtal Semiconductor Field-Effect Transistor)소자의 고주파 대역에서의 Large-Signal특성을 Device/Circuit Model을 통하여 실험치와 비교하여보고 이로부터 최적화된 channel 구조를 갖는 소자구조에서의 RF특성을 조사한다.

• Journal of the Semiconductor & Display Technology
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• v.22 no.1
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• pp.49-53
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• 2023

In this paper, we propose an antirandom pattern-based test method considering power consumption to compensate for the problem that the fault coverage through random test decreases or the test time increases significantly when the DUT circuit structure is complex or large. In the proposed method, a group unit test pattern generation process and rearrangement process are added to improve the problems of long calculation time and high-power consumption, which are disadvantages of the previous antirandom test.