• Proceedings of the KIPE Conference
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• 1998.10a
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• pp.79-84
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• 1998

A novel zero voltage and zero current switching (ZVZCS) full bridge (FB) PWM converter with low output current ripple is presented. A simple auxiliary circuit added in the secondary provides ZVZCS conditions to primary switches, ZVS for leading-leg switches and ZCS for lagging-leg switches, as well as reduces the output current ripple (ideally zero ripple). The auxiliary circuit includes neither lossy components nor additional active switches which are demerits of the previously presented ZVZCS converters. Many advantages including simple circuit topology, high efficiency, low cost and low current ripple make the new converter attractive for high performance high power (＞1kW) applications. The principle of operation, features and design considerations are illustrated and verified on a 2.5kW, 100KHz IGBT based experimental circuit.

• Proceedings of the KIPE Conference
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• 2013.07a
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• pp.461-462
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• 2013

In this paper, a studied the SAW system being developed shipbuilding and plant industry with changing welding method to progress productivity. It studies a SAW system using one sensor instead previous one which is using two sensors. It suggests SAW system which has AC output with high current makes high speed welding and DC output with accurate arcing makes detailed control.

• JSTS:Journal of Semiconductor Technology and Science
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• v.14 no.3
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• pp.300-312
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• 2014

A single-inductor multiple-output (SIMO) DC-DC converter providing buck and boost outputs with a new switching sequence is presented. In the proposed switching sequence, which does not require any additional blocks, input energy is delivered to outputs continuously by flowing current through the inductor, which leads to high conversion efficiency regardless of the balance between the buck and boost output loads. Furthermore, instead of multiple output loop compensation, only the freewheeling current feedback loop is compensated, which minimizes the number of off-chip components and nullifies the need for the equivalent series resistance (ESR) of the output capacitor for loop compensation. Therefore, power conversion efficiency and output voltage ripples can be improved and minimized, respectively. Implemented in a 0.35-${\mu}m$ CMOS, the proposed SIMO DC-DC converter achieves high conversion efficiency regardless of the load balance between the two outputs with maximum efficiency reaching up to 82% under heavy loads.

• Journal of the Korean Institute of Telematics and Electronics S
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• v.34S no.6
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• pp.77-84
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• 1997

buck type converter doesn't appear when an input voltag eis lower than an output voltage. This is the main reason the buck converter has not been used for high power factor converters. In this paper, soft switching high power factor buck converter is proposed. This converter is composed of diode rectifier, input capacitor can be small enough to filter input current, buck converter with loss less snubber circuit. Converter is operated in discontinous conduction mode, turn on of the switching device is a zero current switching (ZCS) and high powr factor input is obtianed. In addition, zero voltage switching (ZVS) at trun off is achieved and switching loss is reduced using loss less snubber circuit. The capacitor used in the snubber circuit raised output voltage. Therefore, proposed converter has higher output voltage and higher efficiency than conventional buck type converter at same duty factor in discontinous conduction mode operation. High power factro, efficiency, soft switching operation of proposed converter is veified by simulation using Pspice and experimental results.

• Journal of Electrical Engineering and Technology
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• v.9 no.5
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• pp.1632-1642
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• 2014

This paper presents an interleaved resonant converter to reduce the voltage stress of power MOSFETs and achieve high circuit efficiency. Two half-bridge converters are connected in series at high voltage side to limit MOSFETs at $V_{in}/2$ voltage stress. Flying capacitor is used between two series half-bridge converters to balance two input capacitor voltages in each switching cycle. Variable switching frequency scheme is used to control the output voltage. The resonant circuit is operated at the inductive load. Thus, the input current of the resonant circuit is lagging to the fundamental input voltage. Power MOSFETs can be turn on under zero voltage switching. Two resonant circuits are connected in parallel to reduce the current stress of transformer windings and rectifier diodes at low voltage side. Interleaved pulse-width modulation is adopted to decrease the output ripple current. Finally, experiments are presented to demonstrate the performance of the proposed converter.

• Journal of Power Electronics
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• v.8 no.4
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• pp.332-344
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• 2008

High frequency AC (HFAC) power distribution systems delivering power through a high frequency AC link with sinusoidal voltage have the advantages of simple structure and high efficiency. In a multiple module system, where multiple resonant inverters are paralleled to the high frequency AC bus through connection inductors, it is necessary for the output voltage phase angles of the inverters be controlled so that the circulating current among the inverters be minimized. However, the phase angle of the resonant inverters output voltage can not be controlled with conventional phase shift modulation or pulse width modulation. The phase angle is a function of both the phase of the gating signals and the impedance of the resonant tank. In this paper, we proposed a pulse phase modulation (PPM) concept for the resonant inverters, so that the phase angle of the output voltage can be regulated. The PPM can be used to minimize the circulating current between the resonant inverters. The mechanisms of the phase angle control and the PPM were explained. The small signal model of a PPM controlled half-bridge resonant inverter was analyzed. The concept was verified in a half bridge resonant inverter with a series-parallel resonant tank. An HFAC power distribution system with two resonant inverters connected in parallel to a 500kHz, 28V AC bus was presented to demonstrate the applicability of the concept in a high frequency power distribution system.

• Proceedings of the KIEE Conference
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• 2004.04a
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• pp.133-135
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• 2004

As a result of the recent advances in magnetic materials, the Magnetic Amplifier(Magamp) technique is one of the reliable and cost-effective postregulation method for multiple-output power supply. This is true for high-current postregulated output since at highter output current the efficiency of linear postregulation is unacceptably low, while the complexity of more efficient switch mode postregulator is associated with a significant cost. Magamp have some advantages of higher power density, simple control circuit, good regulation, high frequency and high performance. In this paper, Operation principle of proposed approach and a performance of magamp control circuit with TL431 is described. The comparative analysis of magamp circuit and buck regulator circuit with 20W load condition is conducted. Experimental verifications on multi-output flyback converter are conducted. Simulations and experimental results show that the proposed approach is efficiency and voltage regulation of the auxiliary output is excellent.

• Proceedings of the KIEE Conference
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• 1996.07a
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• pp.328-332
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• 1996

Current controlled inverter is the device which gives fast and accurate current output response for current command Existing current controlled inverters have no way but to take a narrow bandwidth due to resonance of output filter. In this paper, High performance current controlled inverter with multiloop structure is designed and modeling is executed in that basis. This paper realizes the high performance current controlled inverter with the bandwidth above resonant frequency, controls proposed inverter by analog controller, analyzes the performances through simulation and tests 2kW prototype system.

• KIEE International Transaction on Electrical Machinery and Energy Conversion Systems
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• v.2B no.3
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• pp.81-89
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• 2002

The sensorless AC motor drive is a popular topic of study due to the cost and reliability of speed and position sensors. Most sensorless algorithms are based on the mathematical modeling of motors including electrical variables such as phase current and voltage. Therefore, the accuracy of such variables largely affects the performance of the sensorless AC motor drive. However, the output voltage of the SVPWM-VSI, which is widely used in sensorless AC motor drives, has considerable errors. In particular, the SVPWM-VSI is error-prone in the low speed range because the constant DC link voltage causes poor resolution in a low output voltage command and the output voltage is distorted due to dead time and voltage drop. This paper investigates a novel high-performance strategy for overcoming these problems in a sensorless ac motor drive. In this paper, a variation of the DC link voltage and a direct compensation for dead time and voltage drop are proposed. The variable DC link voltage leads to an improved resolution of the inverter output voltage, especially in the motor's low speed range. The direct compensation for dead time and voltage drop directly calculates the duration of the switching voltage vector without the modification of the reference voltage and needs no additional circuits. In addition, the proposed strategy reduces a current ripple, which deteriorates the accuracy of a monitored current and causes torque ripple and additional loss. Simulation and experimentation have been performed to verify the proposed strategy.

• The Journal of the Korea institute of electronic communication sciences
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• v.3 no.2
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• pp.86-92
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• 2008

Othogonal Frequency Division Multiplexing(OFDM) has been taken notice of 4th generation communication method because it has a merit of high data rate(HDR). To realize HDR communication, The OFDM a s high efficient Fast-Fourier-Transform (FFT)/Inversion FFT (IFFT) processor. Currently OFDM is realized by Digital Signal Processor(DSP) but it consumes a lot of Power. Therefore, current-mode FFT LSI has been proposed for compensation of this demerit. In this paper, we propose IVC for current-mode FFT LSI. From the simulation result, the output value of IVC is more than 3V when the value of FFT Block output is more than $7.35{\mu}A$. The output value of IVC is lower than 0.5V when the value of FFT Block output is lower than $0.97{\mu}A$. Designed IVC Low-power Current mode FFT LSI will contribute to the operation of current-mode FFT LSI and the development of next generation wireless communication systems.