• Journal of Power Electronics
• /
• v.16 no.6
• /
• pp.2315-2326
• /
• 2016

This paper discusses the elimination of DC voltage deviation and the enhancement of load current sharing accuracy in multi-terminal high voltage direct current (MT-HVDC) systems. In order to minimize the power line losses in different parallel network topologies and to insure the stable operation of systems, a decentralized control method based on a modified droop control is presented in this paper. Averaging the DC output voltage and averaging the output current of two neighboring converters are employed to reduce the congestion of the communication network in a control system, and the decentralized control method is implemented. By minimizing the power loss of the cable, the optimal load current sharing proportion is derived in order to achieve rational current sharing among different converters. The validity of the proposed method using a low bandwidth communication (LBC) network for different topologies is verified. The influence of the parameters of the power cable on the control system stability is analyzed in detail. Finally, transient response simulations and experiments are performed to demonstrate the feasibility of the proposed control strategy for a MT-HVDC system.

• Journal of Korea Multimedia Society
• /
• v.19 no.2
• /
• pp.352-359
• /
• 2016

This paper presents high efficiency 5A synchronous DC-DC buck converter. The proposed DC-DC buck converter works from 4.5V to 18V input voltage range, and provides up to 5A of continuous output current and output voltage adjustable down to 0.8V. This chip is packaged MCP(multi-chip package) with control chip, top side P-CH switch, and bottom side N-CH switch. This chip is designed in a 25V high voltage CMOS 0.35um technology. It has a maximum power efficiency of up to 94% and internal 3msec soft start and fixed 500KHz PWM(Pulse Width Modulation) operations. It also includes cycle by cycle current limit function, short and thermal shutdown protection circuit at 150℃. This chip size is 2190um*1130um includes scribe lane 10um.

• The Transactions of the Korean Institute of Electrical Engineers
• /
• v.38 no.2
• /
• pp.93-99
• /
• 1989

This paper describes Sinusoidal Wave-Variable Voltage Variable Fequency (SW-VVVF) system for the high efficiency drive of a 3-phase induction motor. SW-VVVF system consists of a 3-phase 24-pulse converter and a SPWM inverter. The converter with additional 2 tap diode circuits in interphase reactor reduces harmonics in input current. The SPWM inverter consists of an improved PLL system and a V/F controller, which reduces harmonics in output current and performs a high efficiency algorithm by maintaining a constant slip frequency and compensating for the velocity variation of the induction motor with the change of load. Therefore, this system reduces harmonics in input and output currents, and also can drive an induction motor with high efficiency in an economical way. We have proved its utility through experiment.

• Proceedings of the KIEE Conference
• /
• 2002.07b
• /
• pp.980-982
• /
• 2002

In this paper, we report the experimental results of the Forward-flyback DC-DC converter with current doubler and synchronous rectifier. The experimental converter, that has a output voltage 1.8V, output current 25A, maximum power of 45W, switching frequency of 290kHz and input voltage range of 36-75V, has been successfully implemented. As a result, in the entire voltage range the measured full load efficiency was above 82%, and the output voltage was regulated at 1.8V within ${\pm}$3% tolerance.

• JSTS:Journal of Semiconductor Technology and Science
• /
• v.9 no.2
• /
• pp.104-109
• /
• 2009

At a lower supply voltage, voltage-mode drivers draw less current than current-mode drivers. In this paper, we newly propose a voltage-mode driver with an additional current path that reduces the output voltage swing without the need for complicated additional circuitry, compared to conventional voltage-mode drivers. The prototype driver is fabriccated in a 0.13-$^{\mu}m$ CMOS technology and used to transmit data streams at the rate of 2.5 Gb/s. Deemphasis is also implemented for the compensation of channel attenuation. With a 1.2-V supply, it dissipates 8.0 mA for a 400-mV output voltage swing.

• Proceedings of the KIPE Conference
• /
• 1997.07a
• /
• pp.256-260
• /
• 1997

To achieve high efficiency in high power and high frequency applications, reduction of switching losses and noise is very important. In this paper, an improved soft switching forward converter is proposed. The proposed converter is constructed by using non-dissipative snubbers in parallel with the main switch and output diode of the conventional forward converter. Due to the use of the non-dissipative snubbers in the primary and secondary, the proposed converter achieves zero-voltage and zero-current switching for all switching devices without switching losses and output diode recovery losses. The complete operating principles, theoritical analysis, experimental results will be presented.

• Proceedings of the IEEK Conference
• /
• 2008.06a
• /
• pp.469-471
• /
• 2008

The charge pump affects the performance of PLL. In designing the charge pump, we need to consider various issues such as current mismatch, charge sharing, feedthrough, charge injection, and leakage current. This paper propose the new charge pump circuit which is improved in terms of the current match over the existing high-speed charge pump. The simple method used for reducing current mismatch is the technique that uses a cascode in order to increase the output resistance of the charge pump. However the method limits the output voltage range of the charge pump. So the method is hard to apply as the supply voltage is lowered. Thus this paper proposes a new charge pump circuit using an op amp instead of the cascode. And the new charge pump circuit has an excellent current matching characteristics over a wide output range.

• Journal of the Korean Institute of Telematics and Electronics S
• /
• v.35S no.3
• /
• pp.185-192
• /
• 1998

This paper presentsa new currnet control method ofthe six-pulse cycloconverter which is used as a variable speed drive system of a large capacity ac mortor. For a high performance control as a vector control, it is necessary that the output current control ofthe power converter has a good characteristic in transient state. A new proposed current control method is that the output current of a cycloconverter is followed after the current reference directly as fast as possible under any condition. Simultion results for the proposed new current control method are shown and its validity of the proposed method is confired.

• Proceedings of the KIPE Conference
• /
• 1998.07a
• /
• pp.90-94
• /
• 1998

The parallel inverter is popularly used because of its fault-tolerance capability, high-current outputs at constant voltages and system modularity. The conventional parallel inverter usually employes active and reactive power control or frequency and voltage droop control. However, these approaches have the disadvantages that the response time of parallel inverter control is slow against load and system parameter variation to calculate active, reactive power, frequency and voltage. This paper describes a novel control scheme for power equalization in parallel connected inverter. The proposed scheme has a fast power balance control response, a simplicity of implementation, and inherent peak current limiting capability since it employes a instantaneous current/voltage control with output voltage and current balance and output voltage regulation. A design procedure for the proposed parallel inverter controller is presented. Futhermore, the proposed control scheme is verified through the simulation in various cases such as the system parameter variation, the control parameter variation and the nonlinear load condition.

• Proceedings of the KIPE Conference
• /
• 2008.06a
• /
• pp.403-405
• /
• 2008

This paper proposes an output inductor-less active clamp forward converter employing current boost-up circuit for high power density adaptor. By applying the proposed current boost-up circuit, the proposed converter has low conduction loss and low voltage ringing of the secondary rectifier. This paper presents the analysis of the proposed converter and a comparison between the proposed converter and the conventional converter through experiment.