• Title/Summary/Keyword: Harmonic Distortion

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An Adaptive Reclosing Scheme Based on the Classification of Fault Patterns in Power distribution System (사고 패턴 분류에 기초한 배전계통의 적응 재폐로방식)

  • Oh, Jung-Hwan;Kim, Jae-Chul;Yun, Sang-Yun
    • The Transactions of the Korean Institute of Electrical Engineers A
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    • v.50 no.3
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    • pp.112-119
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    • 2001
  • This paper proposes an adaptive reclosing scheme which is based on the classification of fault patterns. In case that the first reclosing is unsuccessful in distribution system employing with two-shot reclosing scheme, the proposed method can determine whether the second reclosing will be attempted of not. If the first reclosing is unsuccessful two fault currents can be measured before the second reclosing is attempted, where these two fault currents are utilized for an adaptive reclosing scheme. Total harmonic distortion and RMS are used for extracting the characteristics of two fault currents. And the pattern of two fault currents is respectively classified using a mountain clustering method a minimum-distance classifier. Mountain clustering method searches the cluster centers using the acquired past data. And minimum-distance classifier is used for classifying the measured two currents into one of the searched centers respectively. If two currents have the different pattern it is interpreted as temporary fault. But in case of the same pattern, the occurred fault is interpreted as permanent. The proposed method was tested for the fault data which had been measured in KEPCO's distribution system, and the test results can demonstrate the effectiveness of the adaptive reclosing scheme.

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Robust Deadbeat Current Control Method for Three-Phase Voltage-Source Active Power Filter

  • Nishida, Katsumi;Ahmed, Tarek;Nakaoka, Mutsuo
    • Journal of Power Electronics
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    • v.4 no.2
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    • pp.102-111
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    • 2004
  • This paper is concerned with a deadbeat current control implementation of shunt-type three-phase active power filter (APF). Although the one-dimensional deadbeat control method can attain time-optimal response of APF compensating current, one sampling period is actually required fur its settling time. This delay is a serious drawback for this control technique. To cancel such a delay and one more delay caused by DSP execution time, the desired APF compensating current has to be predicted two sampling periods ahead. Therefore an adaptive predictor is adopted for the purpose of both predicting the control error of two sampling periods ahead and bringing the robustness to the deadbeat current control system. By adding the adaptive predictor output as an adjustment term to the reference value of half a source voltage period before, settling time is made short in a transient state. On the other hand, in a steady state, THD (total harmonic distortion) of the utility grid side AC source current can be reduced as much as possible, compared to the case that ideal identification of controlled system could be made.

A Novel Three Phase Series-Parallel Resonant Converter Fed DC-Drive System

  • Daigavane, Manoj;Suryawanshi, Hiralal;Khan, Jawed
    • Journal of Power Electronics
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    • v.7 no.3
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    • pp.222-232
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    • 2007
  • This paper presents the application of a single phase AC-to-DC converter using a three-phase series parallel (SPRC) resonant converter to variable speed dc-drive. The improved power quality converter gives the input power factor unity over a wide speed range, reduces the total harmonic distortion (THD) of ac input supply current, and makes very low ripples in the armature current and voltage waveform. This soft-switching converter not only possesses the advantages of achieving high switching frequencies with practically zero switching losses but also provides full ranges of voltage conversion and load variation. The proposed drive system is the most appropriate solution to preserve the present separately excited de motors in industry compared with the use of variable frequency ac drive technology. The simulation and experimental results are presented for variable load torque conditions. The variable frequency control scheme is implemented using a DSP- TMS320LF2402. This control reduces the switching losses and current ripples, eliminates the EMI and improves the efficiency of the drive system. Experimental results confirm the consistency of the proposed approach.

One-Cycle Control Strategy for Dual-Converter Three-Phase PWM Rectifier under Unbalanced Grid Voltage Conditions

  • Xu, You;Zhang, Qingjie;Deng, Kai
    • Journal of Power Electronics
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    • v.15 no.1
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    • pp.268-277
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    • 2015
  • In this paper, a dual-converter three-phase pulse width modulation (PWM) rectifier based on unbalanced one-cycle control (OCC) strategy is proposed. The proposed rectifier is used to eliminate the second harmonic waves of DC voltage and distortion of line currents under unbalanced input grid voltage conditions. The dual-converter PWM rectifier employs two converters, which are called positive-sequence converter and negative-sequence converter. The unbalanced OCC system compensates feedback currents of positive-sequence converter via grid negative-sequence voltages, as well as compensates feedback currents of negative-sequence converter via grid positive-sequence voltages. The AC currents of positive- and negative-sequence converter are controlled to be symmetrical. Thus, the workload of every switching device of converter is balanced. Only one conventional PI controller is adopted to achieve invariant power control. Then, the parameter tuning is simplified, and the extraction for positive- and negative-sequence currents is not needed anymore. The effectiveness and the viability of the control strategy are demonstrated through detailed experimental verification.

Implementation of an FPGA-based Multi-Carrier PWM Techniques for Multilevel Inverter (FPGA기반 멀티레벨 인버터의 다중 반송신호 PWM 기법 구현)

  • Chun, Tae-Won;Lee, Hong-Hee;Kim, Heung-Geun;Nho, Eui-Cheol
    • The Transactions of the Korean Institute of Power Electronics
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    • v.15 no.4
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    • pp.288-295
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    • 2010
  • Multi-level inverters have drawn much of attention in recent years because it can meet the demand of high power applications and good power quality associated with reduced harmonic distortion. As the number of voltage level increases, field programmable gate arrays (FPGAs) are suitable for the implementation of multi-level modulation algorithm. This paper proposes the implementation method for generating PWM pulses at the three phase diode clamped five-level inverter using FPGA. The strategy for communicating stably the data of three-phase reference voltages between the DSP and FPGA is suggested. The techniques for generating PWM signals based on a multi-carrier modulation method are carried out through the experiments with 32-bit DSP and Cyclone-III FPGA.

A Bridgeless Single Stage AC-DC Converter for Wireless Power Charging System (무선전력충전시스템을 위한 브리지리스 단일전력단 교류-직류 컨버터)

  • Kim, Min-Ji;Yoo, Sang-Jae;Yoo, Kyung-Jong;Woo, Jung-Won;Kim, Eun-Soo;Hwang, In-Gab
    • The Transactions of the Korean Institute of Power Electronics
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    • v.25 no.1
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    • pp.44-53
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    • 2020
  • A bridgeless single-stage AC-DC converter for wireless power charging systems is proposed. This converter is composed of a PFC stage and a three-level hybrid DC-DC stage. The proposed converter can control the wide output voltage (200-450 VDC) by the variable link voltage and the pulse-width voltage applied to the primary resonant circuit due to the phase-shifted modulation at a fixed switching frequency. Moreover, the input power factor and the total harmonic distortion can be improved by using the proposed converter. A 1 kW prototype was fabricated and validated through experimental results and analysis.

The 1.6[kW] Class Single Phase ZCS-PWM High Power Factor Boost Rectifier (1.6[kW]급 단상 ZCS-PWM HPF 승압형 정류기)

  • Mun, S.P.;Kim, S.I.;Yun, Y.T.;Kim, Y.M.;Lee, H.W.;Suh, K.Y.
    • Proceedings of the KIEE Conference
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    • 2003.07b
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    • pp.1169-1171
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    • 2003
  • This paper presents a 1.6[kW]class single phase high power factor(HPF) pulse width modulation(PWM) boost rectifier featuring soft commutation of the active switches at zero current. It incorporates the most desirable properties of conventional PWM and soft switching resonant techniques. The input current shaping is achieved with average current mode control and continuous inductor current mode. This new PWM converter provides zero current turn on and turn off of the active switches, and it is suitable for high power applications employing insulated gate bipolar transistors(IGBT'S). The principle of operation, the theoretical analysis, a design example, and experimental results from laboratory prototype rated at 1.6[kW] with 400[Vdc] output voltage are presented. The measured efficiency and the power factor were 96.2[%] and 0.99[%], respectively, with an input current Total Harmonic Distortion(THD) equal to 3.94[%], for an input voltage with THD equal to 3.8[%], at rated load.

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Common-mode Voltage Reduction for Inverters Connected in Parallel Using an MPC Method with Subdivided Voltage Vectors

  • Park, Joon Young;Sin, Jiook;Bak, Yeongsu;Park, Sung-Min;Lee, Kyo-Beum
    • Journal of Electrical Engineering and Technology
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    • v.13 no.3
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    • pp.1212-1222
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    • 2018
  • This paper presents a model predictive control (MPC) method to reduce the common-mode voltage (CMV) for inverters connected in parallel, which increase the capacity of energy storage systems (ESSs). The proposed method is based on subdivided voltage vectors, and the resulting algorithm can be applied to control the inverters. Furthermore, we use more voltage vectors than the conventional MPC algorithm; consequently, the quality of grid currents is improved. Several methods were proposed in order to reduce the CMV appearing during operation and its adverse effects. However, those methods have shown to increase the total harmonic distortion of the grid currents. Our method, however, aims to both avoid this drawback and effectively reduce the CMV. By employing phase difference in the carrier signals to control each inverter, we successfully reduced the CMV for inverters connected in parallel, thus outperforming similar methods. In fact, the validity of the proposed method was verified by simulations and experimental results.

An Electric-Field Coupled Power Transfer System with a Double-sided LC Network

  • Xie, Shi-Yun;Su, Yu-Gang;Zhou, Wei;Zhao, Yu-Ming;Dai, Xin
    • Journal of Power Electronics
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    • v.18 no.1
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    • pp.289-299
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    • 2018
  • Electric-field coupled power transfer (ECPT) systems employ a high frequency electric field as an energy medium to transfer power wirelessly. Existing ECPT systems have made great progress in terms of increasing the transfer distance. However, the topologies of these systems are complex, and the transfer characteristics are very sensitive to variations in the circuit parameters. This paper proposes an ECPT system with a double-sided LC network, which employs a parallel LC network on the primary side and a series LC network on the secondary side. With the same transfer distance and output power, the proposed system is simpler and less sensitive than existing systems. The expression of the optimal driving voltage for the coupling structure and the characteristics of the LC networks are also analyzed, including the transfer efficiency, parameter sensitivity and total harmonic distortion. Then, a design method for the system parameters is provided according to these characteristics. Simulations and experiments have been carried out to verify the system properties and the design method.

Fault Tolerant Operation of CHB Multilevel Inverters Based on the SVM Technique Using an Auxiliary Unit

  • Kumar, B. Hemanth;Lokhande, Makarand M.;Karasani, Raghavendra Reddy;Borghate, Vijay B.
    • Journal of Power Electronics
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    • v.18 no.1
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    • pp.56-69
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    • 2018
  • In this paper, an improved Space Vector Modulation (SVM) based fault tolerant operation on a nine-level Cascaded H-Bridge (CHB) inverter with an additional backup circuit is proposed. Any type of fault in a power converter may result in a power interruption and productivity loss. Three different faults on H-bridge modules in all three phases based on the SVM approach are investigated with diagrams. Any fault in an inverter phase creates an unbalanced output voltage, which can lead to instability in the system. An additional auxiliary unit is connected in series to the three phase cascaded H-bridge circuit. With the help of this and the redundant switching states in SVM, the CHB inverter produces a balanced output with low harmonic distortion. This ensures high DC bus utilization under numerous fault conditions in three phases, which improves the system reliability. Simulation results are presented on three phase nine-level inverter with the automatic fault detection algorithm in the MATLAB/SIMULINK software tool, and experimental results are presented with DSP on five-level inverter to validate the practicality of the proposed SVM fault tolerance strategy on a CHB inverter with an auxiliary circuit.