• 제목/요약/키워드: Hardware Structure

검색결과 888건 처리시간 0.032초

PBL을 기반으로 한 건축구조공학 교육시스템의 개발 (A Study on Development of Education System based on PBL for Architectural Structure Engineering)

  • 강종
    • 한국산학기술학회논문지
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    • 제13권1호
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    • pp.51-58
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    • 2012
  • 이 논문에서는 건축구조공학의 창의성 교육을 활성화하기 위한 대안으로 문제기반학습(PBL : Problem-Based Learning) 교육시스템을 개발하였다. 이러한 시스템의 개발에서는 먼저 건축구조공학 교육의 PBL에 대한 고찰을 통하여 과제도출 및 교육 프로세스를 제시하였다. 개발된 교육시스템은 크게 구조 모형의 하드웨어 시스템과 교육 시스템상에서 활용 가능한 코스웨어로 구성되어 있다.

Partial Scan Design based on Levelized Combinational Structure

  • Park, Sung-Ju
    • Journal of Electrical Engineering and information Science
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    • 제2권3호
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    • pp.7-13
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    • 1997
  • To overcome the large hardware overhead attendant in the full scan design, the concept of partial scan design has emerged with the virtue of less area and testability close to full scan. Combinational Structure has been developed to avoid the use of sequential test generator. But the patterns sifted on scan register have to be held for sequential depth period upon the aid of the dedicated HOLD circuit. In this paper, a new levelized structure is introduced aiming to exclude the need of extra HOLD circuit. The time to stimulate each scan latch is uniquely determined on this structure, hence each test pattern can e applied by scan shifting and then pulsing a system clock like the full scan but with much les scan flip-flops. Experimental results show that some sequential circuits are levelized by just scanning self-loop flip-flops.

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MUX를 사용한 H.264용 저전력 디블로킹 필터 구조 (Low-power Structure for H.264 Deblocking Filter Using Mux)

  • 박진수;한규훈;오세만;장영범
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2006년도 하계종합학술대회
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    • pp.339-340
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    • 2006
  • In this paper, a low-power deblocking filter structure for H.264 video coding algorithm is proposed. By sharing addition hardware for common filter coefficients, we have designed an efficient deblocking filter structure. Proposed deblocking filter utilizes MUX and DEMUX circuits for input data sharing and shows 44.2% reduction for add operation. In the HDL coding simulation and FPGA implementation, we achieved 19.5% and 19.4% gate count reduction, respectively, comparison with the conventional deblocking filter structure.

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블루투스 베이스밴드의 Test Suite Structure에 의한 테스트 방안 (Test Method with TSS in Bluetooth Baseband)

  • 문상국
    • 한국정보통신학회:학술대회논문집
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    • 한국해양정보통신학회 2005년도 추계종합학술대회
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    • pp.997-999
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    • 2005
  • 블루투스 베이스밴드를 효율적으로 테스트하기 위하여, 블루투스 버전 1.1에서는 TSS를 (Test Suite Structure) 제공한다. TSS에서 정의한 part.1-3의 부분에 대한 테스트를 구현함으로써 블루투스 베이스밴드가 인증을 받을 수 있는 것이다. 본 고에서는 TSS vl.0에서 제시하는 테스트 스펙에 근거하여 블루투스 베이스밴드에 대한 설계를 검증하고 테스트 하는 방법에 대해서 논한다. 또한 테스트를 수행하기 위한 다양한 시나리오와 가능성에 대해서 논한다.

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자동화 컨테이너크레인의 개방형 하이브리드 제어시스템에 관한 연구 (An Open-Architecture Hybrid Control System for Automated Container Cranes)

  • 홍경태;김성훈;오승민;홍금식
    • 제어로봇시스템학회논문지
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    • 제11권6호
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    • pp.510-517
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    • 2005
  • In this paper, an open architecture control system for automated container cranes is investigated. The hardware architecture for automating cranes is first discussed. A standard reference model for cranes based upon the OSACA platform is proposed, in which three modules are suggested: hardware module, operating system module, and application software module. Finally, a hybrid control system combining deliberative and reactive controls for autonomous operations of the cranes is implemented.

2-D Large Inverse Transform (16×16, 32×32) for HEVC (High Efficiency Video Coding)

  • Park, Jong-Sik;Nam, Woo-Jin;Han, Seung-Mok;Lee, Seong-Soo
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제12권2호
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    • pp.203-211
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    • 2012
  • This paper proposes a $16{\times}16$ and $32{\times}32$ inverse transform architecture for HEVC (High Efficiency Video Coding). HEVC large transform of $16{\times}16$ and $32{\times}32$ suffers from huge computational complexity. To resolve this problem, we proposed a new large inverse transform architecture based on hardware reuse. The processing element is optimized by exploiting fully recursive and regular butterfly structure. To achieve low area, the processing element is implemented by shifters and adders without multiplier. Implementation of the proposed 2-D inverse transform architecture in 0.18 ${\mu}m$ technology shows about 300 MHz frequency and 287 Kgates area, which can process 4K ($3840{\times}2160$)@ 30 fps image.

쿼드콥터 제어 방법 고찰 (Review on the Control Methods of Quadcopters)

  • 윤종현;이승희;박종현;한철희
    • 융복합기술연구소 논문집
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    • 제5권2호
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    • pp.13-19
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    • 2015
  • Recently, quadcopters have been popular as aerial drones. The structure of quadcopters is simpler than traditional helicopters and they are easy to construct and maneuver. Various hardware platforms for quadcopters have been developed. However, the controller design is not easy due to the requirement of 6-DOF flights using 4 rotors(control inputs)(under-actuated systems). In order to overcome the underactuation problem, various control methods - PID, LQR, $H_{\infty}$, SMC, backstepping control, and etc. - have been suggested for the control of quadcopters. In this paper, dynamic features and control methods of quadcopters are reviewed and evaluated. Future works are proposed for designing the advanced controllers of quadcopters.

개방형 로봇제어를 위한 표준기준모델에 관한 연구

  • 김호철;홍금식;이석희
    • 한국정밀공학회:학술대회논문집
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    • 한국정밀공학회 1995년도 추계학술대회 논문집
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    • pp.872-875
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    • 1995
  • The strategy of open architecture control system intends to integrate manufacturing components on a single platform, so that a particular component can be easily added and/or replaced. Therefore, the control scheme is neither hardware dependent nor software dependent. In this paper a modular and object oriented approach for the open architecture structure of control systems is invesigated. A standard reference model for genetic manufacturer system, which consists of three modules; hardware module, operating system module, and application software module, is first proposed. Then a standard reference model for open architecture robot control system is suggested.

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버퍼의 점유도에 기초한 입력버퍼 ATM 스위치의 경합제어 방식 (A contention resolution scheme based on the buffer occupancy for th einput-buffer ATM switch)

  • 백정훈;박제택
    • 전자공학회논문지S
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    • 제34S권1호
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    • pp.36-42
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    • 1997
  • This paper proposes a high-speed contention resolution scheme featuring high flexibility to the bursty traffic for an input buffering ATM switching architecture and its hardware strategy. The scheme is based on the threshold on the occupancy of the input buffer. As the proposed scheme utilizes the threshold, it has high flexibility to the fluctuations of the input traffic. The hardware strategy for the proposed policy is provided with the aim of the simple structure that achieves the reduction of the signal path and the power consumption. The performance on the average buffer size of the proposed policy is performed and compared with the conventional schame under the bursty traffic through both the analysis based on the markov hain and the simulation. The relations among the parameters on the proposed policy is analyzed to improve the performance.

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PC를 이용한 NC제어장치의 개발 (Development of NC controller using personal computer)

  • 김일환;강용근;정광조
    • 제어로봇시스템학회:학술대회논문집
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    • 제어로봇시스템학회 1989년도 한국자동제어학술회의논문집; Seoul, Korea; 27-28 Oct. 1989
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    • pp.308-312
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    • 1989
  • We developed a model of NC controller with IBM-PC as a host cpu and integlligent NC servo controller for 2 axes that can be expaned to 4 axes. Basic conceptions, including hardware structure design, servo controller design, communication protocol, and interpolation hardware design was already publicated on '87 KIEE conference. Following this, we focussed on the emulation of tyhe controller with X-Y table as complete NC machine experimenting some drawings made by NC code program that can be edited and executed in automatic on single step mode. In addition we designed the M.S.T functions with PLC and tested for M-function timing. Finally, we designed NC interface to fit with M-function output and we contructed total system of NC controller with IBM PC host with the result of successful development of new NC model.

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