• JSTS:Journal of Semiconductor Technology and Science
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• v.12 no.2
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• pp.212-218
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• 2012

A stereo vision is able to build three-dimensional maps of its environment. It can provide much more complete information than a 2D image based vision but has to process, at least, that much more data. In the past decade, real-time stereo has become a reality. Some solutions are based on reconfigurable hardware and others rely on specialized hardware. However, they are designed for their own specific applications and are difficult to extend their functionalities. This paper describes a vision system based on a System on a Chip (SoC) platform. A real-time stereo image correlator is implemented using Sum of Absolute Difference (SAD) algorithm and is integrated into the vision system using AMBA bus protocol. Since the system is designed on a pre-verified platform it can be easily extended in its functionality increasing design productivity. Simulation results show that the vision system is suitable for various real-time applications.

• ETRI Journal
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• v.19 no.3
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• pp.186-201
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• 1997

In this paper, a home location register (HLR) for CDMA mobile communication system (CMS) is introduced. It stores the mobile station (MS) subscribers locations and supplementary service information. Call processing procedures for HLR are developed to receive and store subscriber's location coming from mobile exchange (MX) during the location registration, and to transfer subscriber's location and supplementary service information to the MX during the mobile-terminated call setup. For fast call processing by increasing database access speed, a memory-resident database management system is devised. For Easy and secure HLR operation, administration and maintenance functions and overload control mechanisms are implemented. Designed HLR hardware platform is expandable and flexible enough to reallocated software blocks to any subsystems within the platform. It is configurable according to the size of subscribers. An authentication center (AC) is developed on the same platform. It screens the qualified MS from the unqualified. The calls to and from the unqualified MS are rejected in CMS. To authenticate the MS, the AC generates a new authentication parameter called "AUTHR" using shared secret data (SSD) and compared it with the other AUTHR received from the MS. The MC also generates and stores seed keys called "A-keys" which are used to generate SSDs. The HLR requirements, the AC requirements, software architecture, hardware platform, and test results are discussed.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.18 no.10
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• pp.2462-2472
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• 2014

Recently, the computing paradigm has been changing and VoIP technology is being revisited to support various services. In this paper, we have designed and implemented the system of software PBX open source Asterisk, hardware platform, and mobile devices to support secured voice service based on VoIP. Specially, we designed the various platform from single board to servers based on XenServer in hardware platform. And we verified the delay test of network traffics and the secured voice communication test based on this platform.

• Journal of Korea Multimedia Society
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• v.12 no.5
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• pp.617-632
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• 2009

In this paper we propose a technique of implementing the reconfigurable network protocol stack that allows for partitioning network protocol functions into software and hardware tasks on a SoC (System on Chip) platform. Additionally, we present a method that guarantees the deadline of both an individual task and messages exchanging among tasks in order to meet the deadline of real-time multimedia and networking services. The proposed real-time message exchange method guarantees the deadline of messages generated by multimedia services that are required to meet the real-time properties of multimedia applications. After implementing the networking functions of TCP/IP protocol suite into hardware and software tasks, we verify and validate their performance on the SoC platform. Experimental results indicate that the proposed technique improves the performance of TCP/IP protocol suit as well as application service satisfaction in application-specific real-time.

• Journal of the Korea Society of Computer and Information
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• v.22 no.8
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• pp.47-53
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• 2017

In this paper, we present open hardware platforms for Internet of Things (IoTs) emphasizing their strengths and weaknesses. We introduce six representative platforms, Raspberry PI, Arduino, Garileo, Edison, Beagle board and Artik. We define important performance issues for open hardware platforms for IoTs and analyze recent platforms according to the performance issues. We present recent research project using open hardware platforms introduced in this paper. We believe that this paper provide wise view and necessary information for open hardware platforms for Internet of Things (IoT).

• Journal of Korea Game Society
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• v.8 no.4
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• pp.65-73
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• 2008

In this paper, we designed and implemented edutainment platform that can be effectively applied to developmental disabilities for their education and treatment of sensibility and intelligence training. We developed embedded hardware and contents authoring tool to make multimedia contents operated on the hardware, a management tool to provide result of training, and a real-time monitoring tool for observing the state of study. The hardware is designed by considering the characteristics of developmental disabilities and provides visual, auditory and tactile sense to assist sensibility training for their attention. User-friendly and easy-to-use authoring tool enable teachers and non-specialist to make educational contents. Also the real-time monitoring tool make us to observe user's status even in the outside of classroom. The management tool stores result of training and make us to review the result for further steps. Using this edutainment platform, efficient repetitive training is possible without restriction of time and location. Also when it applied to practical education, we can recognize that our system is effective on improving the ability of attention and studying.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.33 no.4A
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• pp.387-393
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• 2008

In this paper, we present an SDR (Software Defined Radio) handset modem platform which supports communication systems such as HSDPA (High Speed Downlink Packet Access), and WiBro (Wireless Broadband Portable Internet). The proposed SDR platform employs DSPs (Digital Signal Processors), FPGAs (Field Programmable Gate Arrays), and microprocessors in such a way that the various communication functions like HSDPA and WiBro can be programmed and downloaded to the hardware platform. The proposed SDR platform can be used for functional verification of the physical layers of the mobile handset system in the mobile communication network. We first demonstrate the receiving structure of the physical layer of the HSDPA and WiBro system. Then, the hardware implementation of the proposed SDR platform is shown with functions and optimized signal flows required at each mode. Finally, the link performance of each mode operating on the proposed SDR platform is presented through the internal loopback tests with the test vectors. The experimental performance has been compared with the computer simulation results.

• 제어로봇시스템학회:학술대회논문집
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• 1992.10a
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• pp.112-116
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• 1992

In this paper, a fuzzy logic controller(FLC) is designed for the pointing loop of the spin-stabilized platform. For the fuzzy inference, a fuzzy accelerator board using the Togai InfraLogic software and digital fuzzy processor(DFP110FC) is designed, and a validation of an algorithm for fuzzy logic control is also presented. The pointing loop of the spin-stabilized platform using FLC has better performance of step responses than a proportional controller in case of same loop hain through the software simulation and the experiment of implemented hardware.

• Journal of the Korea Society of Computer and Information
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• v.16 no.11
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• pp.1-8
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• 2011

The requirement of a system-on-a-chip (SoC) design is increasing, which combines various and complex functional units on a single device. However, short time to market prohibits to release the device. To satisfy this shorter time-to-market, verification of both hardware and software at the same time is important. A virtual platform-based design method supports faster verification of these combined software and hardware by reusing pre-defined intellectual properties (IP). In this paper, we introduce the virtual platform-based design and redesign the existing ARM processor based S3C2440A system using the virtual platform-based method. In addtion, we implement and evaluate the performance of a JPEG decoder on the S3C2440A virtual platform. Furthermore, we introduce an optimized technique of the JPEG decoder using the ARM based inline assembly language, and then verify the performance improvement on the virtual platform. Such virtual platform-based design allows to verify both software and hardware at the same time and can meet the requirement of the shorter time-to-market.

• Proceedings of the KIEE Conference
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• 2005.05a
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• pp.227-229
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• 2005

This paper proposes a method of implementation of digital convergence platform(DCP) which enable the service of broadcasting, communication, multimedia and home automation. Also digital convergence platform based on MPEG-21 multimedia framework can be a model to provide a distributed electronic commerce environment of multimedia and to manage of it. Platform hardware is implemented using a general purpose CPU and high performance digital signal processor and has peripheral units for network and multi I/O. It is able to run applications of multimedia which has variable formats on DSP. In addition, a personal transaction of multimedia packaged with MPEG-21 multimedia framework is provided on digital convergence platform. Like this, digital convergence platform bring up a new architecture of multimedia systems using a new generation network.