• Journal of Positioning, Navigation, and Timing
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• v.6 no.4
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• pp.195-203
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• 2017

A 2U cube satellite called SNUGLITE has been developed by GNSS Research Laboratory in Seoul National University. Its main mission is to perform actual operation by mounting dual-frequency global positioning system (GPS) receivers. Its scientific mission aims to observe space environments and collect data. It is essential for a cube satellite to control an Earth-oriented attitude for reliable and successful data transmission and reception. To this end, an attitude estimation and control algorithm, Attitude Determination and Control System (ADCS), has been implemented in the on-board computer (OBC) processor in real time. In this paper, the Extended Kalman Filter (EKF) was employed as the attitude estimation algorithm. For the attitude control technique, the Linear Quadratic Gaussian (LQG) was utilized. The algorithm was verified through the processor in the loop simulation (PILS) procedure. To validate the ADCS algorithm in the ground, the experimental verification via a single axis Hardware-in-the-loop simulation (HILS) was used due to the simplicity and cost effectiveness, rather than using the 3-axis HILS verification (Schwartz et al. 2003) with complex air-bearing mechanism design and high cost.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.4 no.3
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• pp.243-257
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• 2010

Rapid developments in wireless sensor networks have extended many applications, hence, many studies have developed wireless sensor network positioning systems for indoor environments. Among those systems, the Global Position System (GPS) is unsuitable for indoor environments due to Line-Of-Sight (LOS) limitations, while the wireless sensor network is more suitable, given its advantages of low cost, easy installation, and low energy consumption. Due to the complex settings of indoor environments and the high demands for precision, the implementation of an indoor positioning system is difficult to construct. This study adopts a low-cost positioning method that does not require additional hardware, and uses the received signal strength (RSS) values from the receiver node to estimate the distance between the test objects. Since many objects in indoor environments would attenuate the radio signals and cause errors in estimation distances, knowing the path loss exponent (PLE) in an environment is crucial. However, most studies preset a fixed PLE, and then substitute it into a radio propagation loss model to estimate the distance between the test points; such method would lead to serious errors. To address this problem, this study proposes a Path Loss Exponent Estimation Algorithm, which uses only four beacon nodes to construct a radio propagation loss model for an indoor environment, and is able to provide enhanced positioning precision, accurate positioning services, low cost, and high efficiency.

• Proceedings of the Korea Information Processing Society Conference
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• 2010.11a
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• pp.837-840
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• 2010

Wireless Sensor Networks have been proposed for several location-dependent applications. For such systems, the cost and limitations of the hardware on sensing nodes prevent the use of range-based localization schemes that depend on absolute point to point distance estimates. Because coarse accuracy is sufficient for most sensor network applications, solutions in range-free localization are being pursued as a cost-effective alternative to more expensive range-based approaches. In this paper, we proposed a Coefficient Allocated DV-Hop (CA DV-Hop) algorithm which reduces node's location error by awarding a credit value with respect to number of hops of each anchor to an unknown node. Simulation results have verified the high estimation accuracy with our approach which outperforms the classical DV-Hop.

• Proceedings of the Korea Information Processing Society Conference
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• 2010.11a
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• pp.829-832
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• 2010

Wireless Sensor Networks have been proposed for several location-dependent applications. For such systems, the cost and limitations of the hardware on sensing nodes prevent the use of range-based localization schemes that depend on absolute point to point distance estimates. Because coarse accuracy is sufficient for most sensor network applications, solutions in range-free localization are being pursued as a cost-effective alternative to more expensive range-based approaches. In this paper, we proposed a modified DV-Hop (range-free localization) algorithm which reduces node's location error and cumulated distance error by minimizing localization error. Simulation results have verified the high estimation accuracy with our approach which outperforms the classical DV-Hop.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.37 no.3
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• pp.88-97
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• 2000

This paper presents motion estimation method using region segmentation information Motion estimation which is very difficult to be implemented only by software because of intensive computation cost, is implemented by special-purpose hardware in real-time applications In this paper, we propose region based motion estimation algorithm which can reduce the computation cost by using region segmentation information and setting the variable search window compared with FSMA algorithm Secondly, another proposed algorithm is to segment semantic region like face for selective coding and transfer of semantic region using segmented region information This work alms to improving the subjective quality of skin color region or face region m the picture that has slow motion and IS mainly composed of one or two speakers of video conference and video telephony applications.

• The KIPS Transactions:PartA
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• v.19A no.3
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• pp.139-146
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• 2012

In the server cluster environment, one of the ways saving energy is to control server's power according to traffic conditions. This is to determine the ON/OFF state of servers according to energy usage of data center and each server. To do this, we need a way to estimate each server's energy. In this paper, we use a software-based power consumption estimation model because it is more efficient than the hardware model using power meter in terms of energy and cost. The traditional software-based power consumption estimation model has a drawback in that it doesn't know well the computing status of servers because it uses only the idle status field of CPU. Therefore it doesn't estimate consumption power effectively. In this paper, we present a CPU field based power consumption estimation model to estimate more accurate than the two traditional models (CPU/Disk/Memory utilization based power consumption estimation model and CPU idle utilization based power consumption estimation model) by using the various status fields of CPU to get the CPU status of servers and the overall status of system. We performed experiments using 2 PCs and compared the power consumption estimated by the power consumption model (software) with that measured by the power meter (hardware). The experimental results show that the traditional model has about 8-15% average error rate but our proposed model has about 2% average error rate.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.44 no.11
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• pp.137-141
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• 2007

This paper proposes a cost-effective architecture design of an angle-of-arrival (AOA) estimator based on the multiple signal identification and classification (MUSIC) algerian in UWB systems adapting Multi-band OFDM (MB-OFDM) techniques with two-receive antennas. In the proposed method, by modifying the equations of algorithm in order to remove the high computational functions, the computation power can be significantly reduced without significant performance degradation. The proposed architecture is designed and verified by Verilog HDL, and implemented into 0.13um CMOS standard cell and Xilinx FPGA circuits for the estimation of hardware complexity and computation power. From the results of the implementations, we can find that the proposed circuits reduces the hardware complexity by about 43% and the estimated computation power by about 23%, respectively, compared to the architecture employing the original MUSIC algorithm.

• Journal of KIISE:Computing Practices and Letters
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• v.11 no.1
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• pp.15-25
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• 2005

Embedded systems have a set of tasks to execute. These tasks can be implemented either on application specific hardware or as software running on a specific processor. The design of an embedded system involves the selection of hardware software resources, Partition of tasks into hardware and software, and performance evaluation. An accurate estimation of execution time for extreme cases (best and worst case) is important for hardware/software codesign. A tighter estimation of the execution time bound nay allow the use of a slower processor to execute the code and may help lower the system cost. In this paper, we consider an ARM-based embedded system and developed a tool to estimate the tight boundary of execution time of a task with loop bounds and any additional program path information. The tool we developed is based on an exiting timing analysis tool named 'Cinderella' which currently supports i960 and m68k architectures. We add a module to handle ARM ELF object file, which extracts control flow and debugging information, and a module to handle ARM instruction set so that the new tool can support ARM processor. We validate the tool by comparing the estimated bound of execution time with the run-time execution time measured by ARMulator for a selected bechmark programs.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.13 no.9
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• pp.4131-4138
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• 2012

In this paper, we propose a Pedestrian Position Information System(PPIS) using low-cost inertial sensors in GPS-disabled area. The proposed scheme estimates the attitude/heading angle and step detection of pedestrian. Additionally, the estimation error due to the inertial sensors is mitigated by using additional sensors. We implement a portable hardware module to evaluate performance of the proposed system. Through the experiments in indoor building, the estimation error of position information was measured as 2.4% approximately.

• The Journal of The Korea Institute of Intelligent Transport Systems
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• v.7 no.5
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• pp.90-96
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• 2008

This paper presents an algorithm of a single chip acoustic speech enhancement for telematics device. The algorithm consists of two stages, i.e. noise reduction and echo cancellation. An adaptive filter based on cross spectral estimation is used to cancel echo. The external background noise is eliminated and the clear speech is estimated by using MMSE log-spectral magnitude estimation. To be suitable for use in consumer electronics, we also design a low cost, high speed and flexible hardware architecture. The performance of the proposed speech enhancement algorithms were measured both by the signal-to-noise ratio(SNR) and recognition accuracy of an automatic speech recognition(ASR) and yields better results compared with the conventional methods.