• Journal of Power Electronics
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• v.14 no.6
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• pp.1303-1313
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• 2014

Dynamic behavior of the harmonic detection part of an active power filter (APF) has an essential role in filter compensation performances during transient conditions. Instantaneous power (p-q) theory is extensively used to design harmonic detectors for active filters. Large overshoot of p-q theory method deteriorates filter response at a large and rapid load change. In this study the harmonic estimation of an APF during transient conditions for balanced three-phase nonlinear loads is conducted. A novel fuzzy instantaneous power (FIP) theory is proposed to improve conventional p-q theory dynamic performances during transient conditions to adapt automatically to any random and rapid nonlinear load change. Adding fuzzy rules in p-q theory improves the decomposition of the alternating current components of active and reactive power signals and develops correct reference during rapid and random current variation. Modifying p-q theory internal high-pass filter performance using fuzzy rules without any drawback is a prospect. In the simulated system using MATLAB/SIMULINK, the shunt active filter is connected to a rapidly time-varying nonlinear load. The harmonic detection parts of the shunt active filter are developed for FIP theory-based and p-q theory-based algorithms. The harmonic detector hardware is also developed using the TMS320F28335 digital signal processor and connected to a laboratory nonlinear load. The software is developed for FIP theory-based and p-q theory-based algorithms. The simulation and experimental tests results verify the ability of the new technique in harmonic detection of rapid changing nonlinear loads.

• Journal of the Korea Society of Computer and Information
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• v.19 no.4
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• pp.35-41
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• 2014

In this paper, we proposed the implementation of software-based 2D BitBLT engine on the pSOS operating system and the operation of the BitBLT engine on patient monitoring device was verified. To verify the proposed method on the patient monitoring device, we designed prototype PCB board, and verified the operation. We designed the motherboard by using ARM9-based CPU. Because hardware-based BitBLT module was replaced with software-based one, CPU load problem was weighted. To solve this problem, w changed 400Mhz processor instead of 200Mhz processor. We implemented 2D BitBLT kernel module as a device driver which is one of the key elements of a graphics controller GUI in patient monitoring device.

• Journal of the Korean Institute of Intelligent Systems
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• v.14 no.7
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• pp.871-877
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• 2004

In this paper, for manufacturing a custom-made shoes, shape of foot acquired three-dimensional measurement device which makes shoe-last data for needing a custom-made shoes is founded on artificial intelligence technique and it shows method restoring to the original shape in optimized state. the developed system for this study is based on PC which uses existing three dimensional measurement method. And it gains shoe-last and data of foot shape going through 8 CCD(Charge Coupled Device) Which equipped top and bottom, right and left sides and 4 lasers which also equipped both sides and upper and lower sides. The acquired data are processed image processing algorithm using artificial intelligence technique. And result of data management is better quality of removing noise than other system not using artificial intelligence technique and it can simplify post-processing. So, this paper is constituted hardware and software system and it used neural network for determining threshold value, when input image on pre-processing step is being stage of image binarization and present that results.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.2
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• pp.24-30
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• 2009

In this paper, the FPGA modem platform complying with 3GPP Release 7 eHSPA specifications and its regularized verification flow are proposed. The FFGA platform consists of modem board supporting physical layer requirements, MCU and DSP core embedded control board to drive the modem board, and peripheral boards for RF interfacing and various equipment interfaces. On the other hand, the proposed verification flow has been regularized into three categories according to the correlation degrees of hardware-software inter-operation, such as simple function test, scenario test call processing and system-level performance test. When it comes to real implementations, the emulation verification strategy for low power mobile SoC is also introduced.

• Journal of the Korean Institute of Intelligent Systems
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• v.8 no.2
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• pp.70-81
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• 1998

This paper proposes an accurate and cost-effective COA defuzzifier of fuzzy logic controller (FLC). The accuracy of the proposed COA defuzzifier is obtained by involving both membership values and spans of membership functions in calculating a crisp value. The cost-effectiveness of the proposed COA defuzzifier is obtained by replacing the division in the COA defuzzifier by finding an equilibrium point of both the left and right moments. The proposed COA defuzzifier has two disadvantages that it ncreases the hardware complexity due to the additional multipliers and it takes a lot of computation time to find the moment equilibrium point. The first disadvantage is overcome by replacing the multipliers with the stochastic AND operations. The second disadvantage is alleviated by using a coarse-to-fine searching algorithm that accelerates the finding of moment equilibrium point. Application of the proposed COA defuzzifier to the truck backer-upper control problem is performed in the VHDL simulation and the control accuracy of the proposed COA defuzzifier is compared with that of the conventional COA defuzzifier in terms of average tracing distance.

• Journal of Korea Society of Industrial Information Systems
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• v.17 no.1
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• pp.31-38
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• 2012

Next generation cellular applications and smart phone usage generate very heavy wireless data traffic. It becomes ineluctable for mobile network operators to have multiple core network entities such as Serving Gateway and Packet Data Network Gateway in 4G-LTE to share this high traffic generated. A typical configuration consists of multiple serving gateways behind a load-balancer which would determine which serving gateway would service a end-users'request. Such hardware is expensive, has a rigid policy set, and is a single point of failure. Another perspective of today's increasingly high data traffic is that besides it is being widely accepted that the high bandwidth L TE provides is creating bottlenecks for service providers by the increasing user bandwidth demands without creating any corresponding revenue improvements, a hidden problem that is also passively advancing on the newly emerging 4G-LTE that may need more immediate attention is the network signaling traffic, also known as the control-plane traffic that is generated by the applications developed for smartphones and tablets. With this as starting point, in this paper, we propose a solution, by a new approach considering OpenFlow switch connected to a controller, which gains flexibility in policy, costs less, and has the potential to be more robust to failure with future generations of switches. This also solves the problem of scaling the control-plane traffic that is imperative to preserve revenue and ensure customer satisfaction. Thus, with the proposed architecture with OpenFlow, mobile network operators could manipulate the traffic generated by the control-plane signaling separated from the data-plane, besides also reducing the cost in installing multiple core-network entities.

• Journal of Institute of Control, Robotics and Systems
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• v.13 no.2
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• pp.86-92
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• 2007

This paper presents the development of fire-fighting and rescue robot for Outdoor Environment. In the procedure of this development, we follow Target Oriented Design (TOD) which is recognized as the systematic methodology to design a system by specifying the target clearly. For some real fire fighting tasks (e.g. tasks in shopping street and a market), narrow road make it difficult for existing fire engine to access the firing place. On the other hand, for dangerous tasks (e.g. gasoline station and a storehouse) the explosive materials make it impossible for fire-fighters to access the firing place. Moreover, the smoke and the high-temperature caused by fire make fire fighting difficult. In this situation, the solution is to develop the fire-fighting and rescue robot. TOD is performed firstly by analyzing the environment properties of fro place and the demanded tasks and the fire-fighting and rescue robot is manufactured. For safety, the fire fighting robot should be controlled by remote operation to keep the operator away from the fire, and the control system is divided into three parts: the robot controllers, controller for remote operating device and wireless communication system. We have selected and developed appropriate hardware and software for each part of control system with considering TOD. As a result, the fire-fighting robot functions correctly and the performance and usefulness of our control architecture is validated by successfully performing some fire-fighting tasks.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.40 no.6
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• pp.78-86
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• 2003

When we transformed from Monochrome-data to Color-data in text mode, we used hardware-method to design the circuit which is convertible in real time. We saved color information in every screens that can make screen in Color Palette ROM and it is also generated 8bit. lower 4bit assign foreground color and upper 4bit can design to have background color. We have Address Reduction ROM to remove repeated address and reduce volume of Color Palette ROM to 1/16. Besides, we have many D-FF to save address, data and page information temporarily after that, we have management process 8 times through counter in real time. Finally, we chose either foreground color or background color in multiplex and established color information was sended to the color video controller. Thus, you can use it as a good interface when yow transfer many control devices with Monochrome display (ex, LCD Monitor) into devices with Color display.

• Journal of Advanced Marine Engineering and Technology
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• v.39 no.9
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• pp.935-939
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• 2015

This paper describes sensorless speed control of brushless DC motors by using direct torque control. Direct torque control offers fast torque response, robust specification of parameter changes, and lower hardware and processing costs compared to vector-controlled drives. In this paper, the current error compensation method is applied to the sensorless speed control of a brushless DC motor. Through this control technique, the controlled stator voltage is applied to the brushless DC motor such that the error between the stator currents in the mathematical model and the actual motor can be forced to decay to zero as time proceeds, and therefore, the motor speed approaches the setting value. This paper discusses the composition of the controller, which can carry out robust speed control without any proportional-integral (PI) controllers. The simulation results show that the control system has good dynamic speed and load responses at wide ranges of speed.

• Journal of KIISE:Computing Practices and Letters
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• v.11 no.1
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• pp.26-35
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• 2005

Generally, we employ FSMs for the design of controllers in digital systems. FSMs are Implemented with state diagrams generated from control flow. With HDL, we design and verify FSMs based on state diagrams. As the number of states in the system increases, the verification or modification processes become complicated, error prone and time consuming. In this paper, we propose a control flow oriented hardware description language at the register transfer level called Cycle-C. Cycle-C describes FSMs with timing information and control How intensive algorithms. The Cycle-C description is automatically converted into FSMs in the form of synthesizable RTL VHDL. In experiments, we design FSMs for control intensive interface circuits. There is little area difference between Cycle-C design and manual design. In addition, Cycle-C design needs only 10~50% of the number lines of manual RTL VHDL designs.