• Journal of Mechanical Science and Technology
• /
• v.19 no.11
• /
• pp.1998-2006
• /
• 2005

The lane departure avoidance systems have been considered promising to assist human drivers in AVCS (Advanced Vehicle Control System). In this paper, a lane departure monitoring and control system is developed and evaluated in the hardware-in-the-loop simulations. This system consists of lane sensing, lane departure monitoring and active steering control subsystems. The road image is obtained based on a vision sensor and the lane parameters are estimated using image processing and Kalman Filter technique. The active steering controller for avoiding the lane departure is designed based on the lane departure metric. The proposed lane departure avoidance system is realized in a steering HILS (hardware-in-the-loop simulation) tool and its performance is evaluated with a driver in the loop.

• Proceedings of the IEEK Conference
• /
• 2000.11c
• /
• pp.63-66
• /
• 2000

This paper addresses design and implementation of a router based on Linux. Around MPC860T CPU which includes a common communication controller as the main processor, the hardware has two WAN ports and one Ethernet port. Linux was optimized and ported into the hardware, and used as the operating system.

• Journal of the Korean Society for Railway
• /
• v.9 no.6 s.37
• /
• pp.725-731
• /
• 2006

Hot Standby sparing system detecting faults by using software, and being tolerant any faults by using Hardware Redundancy is difficult to perform quantitative reliability prediction and to detect real time faults. Therefore, this paper designs Hot Standby sparing system using hardware basis self checking logic in order to overcome this problem. It also performs failure mode analysis of Hot Standby sparing system with designed self checking logic by using FMEA (Failure Mode Effect Analysis), and identifies reliability assessment of the controller designed by quantifying the numbers of failure development by using FTA (Fault Tree Analysis)

• Transactions of the Korean Society for Noise and Vibration Engineering
• /
• v.20 no.2
• /
• pp.122-128
• /
• 2010

This paper presents vibration control performance of active engine mount system installed with the magneto-rheological(MR) mount and the piezostack mount. The performance is evaluated via hardware-in-the-loop-simulation(HILS) method. As a first step, six degrees-of freedom dynamic model of an in-line four-cylinder engine which has three point mounting system is derived by considering the dynamic behaviors of MR mount and piezostack mount. As a second step, sliding mode controller(SMC) is synthesized to actively control the imposed vibration. In order to demonstrate the effectiveness of the proposed active engine mount, vibration control performances are evaluated under various engine operating speeds(wide frequency range) using HILS method and presented in time and frequency domain.

• Proceedings of the Korean Society of Precision Engineering Conference
• /
• 1992.04a
• /
• pp.354-358
• /
• 1992

This paper describes a development of high speed fuzzy inference circuit for the industrialprocesses. The hardware fuzzy inference circuit is developed utilizing a hardware fuzzy inference circuit is developed utilizing a DSP and a multiplier and accumulator chip. To enhance the inference speed, the pipeline disign is adopted at the bottleneck and the general Max-Min inference method is slightly modified as Max-max method. As a results, the inference speed is evaluated to be 100 KFLIPS. Owing to this high speed feature, satisfactory application can be attained for complex high speed motion control as well as the control of multi-input multi-output nonlinear system. As an application, the developed fuzzy inference circuit is embedded to a PLC (Porgrammable Logic Controller) for industrial process control. For the fuzzy PLC system, to fascilitate the design of the fuzzy control knowledge such as membership functions, rules, etc., a MS-Windows based GUI (Graphical User Interface) software is developed.

• 제어로봇시스템학회:학술대회논문집
• /
• 1990.10a
• /
• pp.634-638
• /
• 1990

In this paper, the architecture of a dataflow logic solving processor for programmable logic controller is proposed. As the proposed DFLSP (dataflow logic solving processor) is designed based on the dataflow architecture, it has inherently concurrent processing and data synchronization capabilities. The proposed DFLSP is adequate for high speed programmable logic controllers and gets rid of data synchronization problem in hardware level. The performance of the proposed DFLSP is analyzed using computer simulations and prototype hardware. With single processing element, the logic solving time is 144 usec per 1K steps of logic program and with eight processing elements, the logic solving time is 23 usec per 1K steps of logic program with reasonable assumptions.

• Journal of Institute of Control, Robotics and Systems
• /
• v.13 no.1
• /
• pp.33-38
• /
• 2007

In this paper, hardware implementation of interface and control between two robots, the master and the slave robot, are designed. The master robot is the motion capturing device that captures motions of the human operator who wears it. The slave robot is the corresponding humanoid robot arms. Captured motions from the master robot are transferred to the slave robot to follow after the master. All hardware designs such as PID controllers, communications between the master robot, encoder counters, and PWM generators are embedded on a single FPGA chip. Experimental studies are conducted to demonstrate the performance of the FPGA controller design.

• Proceedings of the KIEE Conference
• /
• 2015.07a
• /
• pp.527-528
• /
• 2015

최근 다양한 디지털기기에 따른 DC 부하의 증가와 함께 기존 배전망과 연계하여 운용할 수 있는 AC 그리드와 태양광과 연료전지 같은 DC 전원에 직접적으로 연계하여 운용하는 DC 그리드를 통합하는 AC/DC 마이크로그리드에 대한 연구가 진행되고 있다. 본 논문에서는 AC 그리드와 DC 그리드를 연계 제어하는 연계(interlinking) 컨버터의 제어기를 설계하고 성능을 검토하기 위해 TMS320F28335 DSP(Digital Signal Processor)와 실시간 디지털 시뮬레이터인 eMEGAsim으로 구성된 HILS(Hardware-in-the-Loop Simulation) 시스템을 구축하고 설계된 제어기의 성능을 테스트하였다.

• Journal of the Korean Society for Precision Engineering
• /
• v.16 no.4 s.97
• /
• pp.85-94
• /
• 1999

Reconfiguration, expansion, or new establishment of FMS requires the availability of a shop floor control (SFC) system relevant to the FMS since it is closely related with the hardware component of FMS. Due to the expensive cost of its development, significant research efforts have been made to develop an SFC system that is reusable. This paper presents Abstract Machine Tool (AMT) approach applied to develop an SFC sytem that is reusable without additional programming. The AMT model enables us to design the SFC system independently of the hardware-dependent attributes of euqipment; an AMT models a workstation by abstraction and presents an equipment-independent interface to machining cell controller. Specifically, we describe how we formalize the interfaces among equipment in order to build an AMT and how we design the machining cell control software based on AMT models. We also present MACHINIST the machining cell control system for IAE-FMS plant as an implementation example.

• Proceedings of the KIEE Conference
• /
• 1988.07a
• /
• pp.161-164
• /
• 1988

The purpose of this paper is to propose a simple firmware realization of PCM framing system, which exploits LSI memories for performance improvement and hardware simplification. The proposed system simply consists of a tapped delay line for simultaneous observation of in framing-bits and ROM programmed sequence controller for framing process. Perpormance analyses are made in terms of misframe interval, sync-loss-detection time and reframe time. The proposed strategy proved to be significantly better in reframe time, stability and hardware implementation.