• Title/Summary/Keyword: Hardware Controller

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DEVELOPMENT OF A NETWORK-BASED TRACTION CONTROL SYSTEM, VALIDATION OF ITS TRACTION CONTROL ALGORITHM AND EVALUATION OF ITS PERFORMANCE USING NET-HILS

  • Ryu, J.;Yoon, M.;SunWoo, M.
    • International Journal of Automotive Technology
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    • v.7 no.6
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    • pp.687-695
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    • 2006
  • This paper presents a network-based traction control system(TCS), where several electric control units(ECUs) are connected by a controller area network(CAN) communication system. The control system consists of four ECUs: the electric throttle controller, the transmission controller, the engine controller and the traction controller. In order to validate the traction control algorithm of the network-based TCS and evaluate its performance, a Hardware-In-the-Loop Simulation(HILS) environment was developed. Herein we propose a new concept of the HILS environment called the network-based HILS(Net-HILS) for the development and validation of network-based control systems which include smart sensors or actuators. In this study, we report that we have designed a network-based TCS, validated its algorithm and evaluated its performance using Net-HILS.

Effects of the Sampling Time in Motion Controller Implementation for Mobile Robots (모바일 로봇 모션 제어에 있어 샘플링 시간의 효과)

  • Jang, Tae-Ho;Kim, Youngshik
    • Journal of Korean Society of Industrial and Systems Engineering
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    • v.37 no.4
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    • pp.154-161
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    • 2014
  • In this research we investigate motion controller performance for mobile robots according to changes in the control loop sampling time. As a result, we suggest a proper range of the sample time, which can minimize final posture errors while improving tracking capability of the controller. For controller implementation into real mobile robots, we use a smooth and continuous motion controller, which can respect robot's path curvature limitation. We examine motion control performance in experimental tests while changing the control loop sampling time. Toward this goal, we compare and analyze experimental results using two different mobile robot platforms; one with real-time control and powerful hardware capability and the other with non-real-time control and limited hardware capability.

A Hardware-in-the-loop Platform for Modular Multilevel Converter Simulations

  • Liu, Chongru;Tian, Pengfei;Wang, Yu;Guo, Qi;Lin, Xuehua;Wang, Jiayu
    • Journal of Power Electronics
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    • v.16 no.5
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    • pp.1698-1705
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    • 2016
  • In this paper, a hardware-in-the-loop simulation platform for MMCs is established, which connects a real time digital simulator (RTDS) and a designed MMC controller with optical fiber. In this platform, the converter valves are simulated with a small time step of 2.5 microsecond in the RTDS, and multicore technology is implemented for the controller so that the parallel valve control is distributed between different cores. Therefore, the designed controller can satisfy the requirements of real-time control. The functions of the designed platform and the rationality for the designed controller are verified through experimental tests. The results show that different modulation modes and various control strategies can be implemented in the simulation platform and that each control objective can been tracked accurately and with a fast dynamic response.

Decoupled Controller Design of Small Autonomous Underwater Vehicle and Performance Test using HILS (소형 자율 수중 운동체의 비연성 제어기 설계 및 HILS 기법을 이용한 성능 평가)

  • Chul, Hyun
    • Journal of the Korea Institute of Military Science and Technology
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    • v.16 no.2
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    • pp.130-137
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    • 2013
  • In this paper, decoupled controller design for Autonomous Underwater Vehicle(AUV) and its simulated performance test results and Hardware In the Loop Simulation(HILS) results are presented. Control system design is done using the PD control scheme. Stability analysis and step response of closed loop system under uncertain parameter condition are also presented. The results of full coupled nonlinear model simulation show the well applicability of the designed controller. From the results of HILS, we can verify performance of real time processing and implemented hardware for AUV.

Design of a Biped Robot Using DSP and FPGA

  • Oh, Sung-nam;Lee, Sung-Ui;Kim, Kab-Il
    • International Journal of Control, Automation, and Systems
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    • v.1 no.2
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    • pp.252-256
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    • 2003
  • A biped robot should be designed to be an effective mechanical structure and have smaller hardware system if it is to be a stand-alone structure. This paper shows the design methodology of a biped robot controller using FPGA(Field Programmable Gate Array). A hardware system consists of DSP(Digital Signal Processor) as the main CPU, and FPGA as the motor controller. By using FPGA, more flexible hardware system has been achieved, and more compact and simple controller has been designed.

Performance Analysis of UPFC by Simulation & Scaled Hardware Model (시뮬레이션과 축소모형에 의한 UPFC의 성능해석)

  • Park, Ji-Yong;Baek, Seung-Taek;Kim, Hui-Jong;Han, Byeong-Mun;Han, Hak-Geun
    • The Transactions of the Korean Institute of Electrical Engineers B
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    • v.48 no.10
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    • pp.579-586
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    • 1999
  • This paper describes a simulation model and a scaled hardware model to analyze the dynamic performance of Unified Power Flow Controller, which can flexibly adjust the active power flow through the ac transmission line. The design of control system for UPFC was developed using vector control method. The results of simulation and scaled hardware test show that the developed control system works accurately. Both models would be very effective for analyzing the dynamic performance of the Unified Power Flow Controller.

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Development of A Single-Chip Active Noise Controller And Its Evaluation System (단일칩 능동 소음 제어기 및 평가 시스템 개발)

  • Chung, Ikjoo
    • IEMEK Journal of Embedded Systems and Applications
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    • v.16 no.6
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    • pp.241-246
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    • 2021
  • In this paper, we developed the evaluation system for the active noise control so that the algorithms can be easily evaluated in real-time on the system. We implemented the active noise controller based on a single-chip with only additional op-amps for signal conditioning because the TMS320C280049 MCU includes almost all necessary peripherals for the active noise controller. Due to the difficulty in testing algorithms on embedded-type hardware unlike in computer simulation, we also developed GUI-based evaluation software which makes it simple to test algorithms on the hardware. Using the GUI software, we can optimize the parameters of the algorithms with ease in a specific noise environment because the parameters can be adjusted in real-time when the algorithm is running on the hardware.

Hardware-Based Implementation of a PIDR Controller for Single-Phase Power Factor Correction

  • Le, Dinh Vuong;Park, Sang-Min;Yu, In-Keun;Park, Minwon
    • Journal of Korea Society of Industrial Information Systems
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    • v.21 no.4
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    • pp.21-30
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    • 2016
  • In a single-phase power factor correction (PFC), the standard cascaded control algorithm using a proportional-integral-derivative (PID) controller has two main drawbacks: an inability to track sinusoidal current reference and low harmonic compensation capability. These drawbacks cause poor power factor and high harmonics in grid current. To improve these drawbacks, this paper uses a proportional-integral-derivative-resonant (PIDR) controller which combines a type-III PID with proportional-resonant (PR) controllers in the PFC. Based on a small signal model of the PFC, the type-III PID controller was implemented taking into account the bandwidth and phase margin of the PFC system. To adopt the PR controllers, the spectrum of inductor current of the PFC was analyzed in frequency domain. The hybrid PIDR controller were simulated using PSCAD/EMTDC and implemented on a 3 kW PFC prototype hardware. The performance results of the hybrid PIDR controller were compared with those of an individual type-III PID controller. Both controllers were implemented successfully in the single-phase PFC. The total harmonic distortion of the proposed controller were much better than those of the individual type-III PID controller.

Development of the Digital Controller for High Precision Digital Power Supply (고정밀전원장치를 위한 디지털 제어기 개발)

  • Ha, K.M.;Lee, S.K.;Kim, Y.S.
    • Proceedings of the Korean Society of Marine Engineers Conference
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    • 2006.06a
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    • pp.249-250
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    • 2006
  • In this paper, hardware design and implementation of digital controller for the High Precision Digital Power Supply (HPDPS) based on Digital Signal Processor (DSP) and Field Programmable Gate Array (FPGA) is presented. Developed digital controller is composed of high resolution Digital Pulse Width Modulation (DPWM) and high resolution analog to digital converter circuit with anti-aliasing filter. And Digital Signal Processor (DSP) has the capability of a few micro-second calculation time for one feedback loop. 32-bit DSP and DPWM with 150[ps] step resolution is used to implement the HPDPS. Also 18-bit 2 mega sample per second ADC board is adopted for the developed digital controller. Also, hardware structure of the developed digital controller and experimental results of the first prototype board for HPDPS is described.

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Power system Design of KITSAT-4 Satellite (과학위성 1호 전력계 설계)

  • 김일송;이준영;윤명중
    • The Transactions of the Korean Institute of Power Electronics
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    • v.5 no.5
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    • pp.475-483
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    • 2000
  • This paper describes designs about the power system of KITSAT-4 satellite. The KITSAT-4 power system is mainly composed of power stage and control stage. The power stage is a 200〔W〕 buck converter and control stages are hardware controller and software controller The hardware controller is PPT(Peak Power Tracker), battery voltage controller and software controller is battery current controller and direct duty controller. So the operation of power system has many advantages in that it can select controller according to reliable control and precise control. The controller design methods are presented and the small signal analyses are performed to verify system stability.

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