• IEMEK Journal of Embedded Systems and Applications
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• v.4 no.3
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• pp.103-111
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• 2009

Software update has been regarded as one of fundamental functions in wireless sensor networks. It can disseminate a delta-image between a current software image operating on a sensor node and its new image in order to reduce an update image(transmission data) size, resultantly saving energy. In addition, code-banking capability of micro-controllers can decrease the update image size. In order to maximize the efficiency of the software update, the proposed scheme exploits both the delta-image and the code-banking at the same time. Besides, it additionally delivers a recovery delta-image to properly handle abnormal conditions, such as message corruptions and unexpected power-off during the update.

• ETRI Journal
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• v.45 no.6
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• pp.1035-1045
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• 2023

We propose a novel graphics processing unit (GPU) algorithm that can handle a large-scale 3D fast Fourier transform (i.e., 3D-FFT) problem whose data size is larger than the GPU's memory. A 1D FFT-based 3D-FFT computational approach is used to solve the limited device memory issue. Moreover, to reduce the communication overhead between the CPU and GPU, we propose a 3D data-transposition method that converts the target 1D vector into a contiguous memory layout and improves data transfer efficiency. The transposed data are communicated between the host and device memories efficiently through the pinned buffer and multiple streams. We apply our method to various large-scale benchmarks and compare its performance with the state-of-the-art multicore CPU FFT library (i.e., fastest Fourier transform in the West [FFTW]) and a prior GPU-based 3D-FFT algorithm. Our method achieves a higher performance (up to 2.89 times) than FFTW; it yields more performance gaps as the data size increases. The performance of the prior GPU algorithm decreases considerably in massive-scale problems, whereas our method's performance is stable.

• Journal of the Korean Society of Clothing and Textiles
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• v.22 no.7
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• pp.862-871
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• 1998

In this study, the effect of sizing on the physical and mechanical characteristics of Hansan ramie was studied. 2 kinds of Hansan ramie were used for this study and one kind of the chinese ramie was also used for comparing with the characteristics of Hansan ramies. The following results were obtained from this experimental study. The wrinkle recovery angle was gradually reduced according to the increasing of the concentration of sizing agent. As the size agent could easily penetrate between the thick yarms, the effect of sizing on the wrinkle recovery angle was evident on the Chinese and Hansan coarse ramie. The result of KES-F system showed that the sizing affected much on the bending properties and shear properties. As the size concentration was increased the shear properties were increased more evidently on the Chinese and Hansan coarse ramie. The result of KES-F system showed that the sizing affected much on the bending properties and shear properties. As the size concentration was increased the shear properties were increased more evidently than the bending properties. The other mechanical properties didn't changed much by sizing. The calculated primary hand value also showed that the ramie became more stiff after sizing.

• 한국정보컨버전스학회:학술대회논문집
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• 2008.06a
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• pp.199-204
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• 2008

Sensor nodes have various energy and computational constraints because of their inexpensive nature and ad-hoc method of deployment. Considerable research has been focused at overcoming these deficiencies through faster media accessing, more energy efficient routing, localization algorithms and system design. Our research attempts to provide a method of improvement MAC performance in these issues. We show that traditional carrier-sense multiple access(CSMA) protocols like IEEE 802.11 do not handle the first constraint adequately, and do not take advantage of the second property, leading to degraded latency and throughput as the network scales in size, We present more efficient method of a medium access for real-time wireless sensor networks. Proposed MAC protocol is a randomized CSMA protocol, but unlike previous legacy protocols, does not use a time-varying contention window from which a node randomly picks a transmission slot. To reduce the latency for the delivery of event reports, it carefully decides a fixed-size contention window, non-uniform probability distribution of transmitting in each slot within the window. We show that it can offer up to several times latency reduction compared to legacy of IEEE 802.11 as the size of the sensor network scales up to 256 nodes using widely used simulator ns-2. We, finally show that proposed MAC scheme comes close to meeting bounds on the best latency achievable by a decentralized CSMA-based MAC protocol for real-time wireless sensor networks which is sensitive to latency.

• Journal of KIISE:Software and Applications
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• v.32 no.8
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• pp.819-833
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• 2005

Code size reduction is ever becoming more important for compilers targeting embedded processors because these processors are often severely limited by storage constraints and thus the reduced code size can have a positively significant Impact on their performance. Various code size reduction techniques have different motivations and a variety of application contexts utilizing special hardware features of their target processors. In this work, we propose a novel technique that fully utilizes a set of hardware instructions, called the multiple load/store (MLS), that are specially featured for reducing code size by minimizing the number of memory operations in the code. To take advantage of this feature, many microprocessors support the MLS instructions, whereas no existing compilers fully exploit the potential benefit of these instructions but only use them for some limited cases. This is mainly because optimizing memory accesses with MLS instructions for general cases is an NP-hard problem that necessitates complex assignments of registers and memory off-sets for variables in a stack frame. Our technique uses a couple of heuristics to efficiently handle this problem in a polynomial time bound.

• Journal of Computing Science and Engineering
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• v.2 no.3
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• pp.249-273
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• 2008

Epidemic protocols have two fundamental assumptions. One is the availability of a mechanism that provides each node with a set of log(N) (fanout) nodes to gossip with at each cycle. The other is that the network size N is known to all member nodes. While it may be trivial to support these assumptions in small systems, it is a challenge to realize them in large open dynamic systems, such as peer-to-peer (P2P) systems. Technically, since the most fundamental parameter of epidemic protocols is log(N), without knowing the system size, the protocols will be limited. Further, since the network churn, frequently observed in P2P systems, causes rapid membership changes, providing a different set of log(N) at each cycle is a difficult problem. In order to support the assumptions, the fanout nodes should be selected randomly and uniformly from the entire membership. This paper investigates one possible solution which addresses both problems; providing at each cycle a different set of log(N) nodes selected randomly and uniformly from the entire network under churn, and estimating the dynamic network size in the number of nodes. This solution improves the previously developed distributed algorithm called Shuffle to deal with churn, and utilizes the Shuffle infrastructure to estimate the dynamic network size. The effectiveness of the proposed solution is evaluated by simulation. According to the simulation results, the proposed algorithms successfully handle network churn in providing random log(N0 fanout nodes, and practically and accurately estimate the network size. Overall, this work provides insights in designing epidemic protocols for large scale open dynamic systems, where the protocols behave autonomically.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.10 no.6
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• pp.506-511
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• 2017

LED lighting, which many companies are pursuing commercialization, is a representative green energy technology. However, the LED lighting for broadcasting image should have high output and easy portability compared with general LED lighting devices for street lamps, advertisement or transportation devices. Therefore, while shooting a broadcast image if you use LEDs as a substitute light source for halogen lamps and fluorescent lamps that are large in size and uncomfortable to handle it is expected that the lightening of the equipment will activate the broadcasting image lighting equipment industry. After considering the mass production of the LED module board and the SMT production size of the chip mounter, the board size was determined considering the overall size of the product by model. In this paper, four 20W LED boards are arranged vertically in order to produce an 80W board. In other words, by sharing LED module board size by model, high power LED lighting equipments of 120W and 200W can be selected as an increase in the number of boards.

• Journal of IKEEE
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• v.25 no.1
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• pp.180-192
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• 2021

One widely used algorithm for image recognition and pattern detection is the convolution neural network (CNN). To efficiently handle convolution operations, which account for the majority of computations in the CNN, we use hardware accelerators to improve the performance of CNN applications. In using these hardware accelerators, the CNN fetches data from the off-chip DRAM, as the massive computational volume of data makes it difficult to derive performance improvements only from memory inside the hardware accelerator. In other words, data communication between off-chip DRAM and memory inside the accelerator has a significant impact on the performance of CNN applications. In this paper, a simulator for the CNN is developed to analyze the main memory or DRAM access with respect to the size of the on-chip memory or global buffer inside the CNN accelerator. For AlexNet, one of the CNN architectures, when simulated with increasing the size of the global buffer, we found that the global buffer of size larger than 100kB has 0.8x as low a DRAM access count as the global buffer of size smaller than 100kB.

• Journal of the Korean Geotechnical Society
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• v.23 no.2
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• pp.19-27
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• 2007

Dry and wet test methods established by Korean industrial standards to estimate opening size of 3 types of geotextile which are widely used for filter of plastic drain board in Korea are performed to evaluate characteristics of the test methods and to compare the test results. Judging from test results, dry method is a relatively poor test, having lots of problems causing many errors but a simple-quick test. Wet method is a very specific test avoiding many of the problems of dry method such as electrostatic charges, trapping in the geotextiles and so on. However, one of wet test methods, KS K ISO 12956, takes long time to complete a test and is too strict to handle loss of granular material. Generally, opening size of a geotextile by wet test method is smaller than that of dry test method. Especially, opening size by KS F 2126 which is called hydrodynamic method but at present is not used anymore is similar to or smaller than that by KS K ISO 12956 method.

• The Journal of the Korea Contents Association
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• v.15 no.9
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• pp.21-28
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• 2015

In the semi-conductor process, a simulation process is performed to detect defects by analyzing the behavior of the impurity through the physical quantity calculation of the inner element. In order to perform the simulation, Finite-Difference Time-Domain(FDTD) algorithm is used. The improvement of semiconductor which is composed of nanoscale elements, the size of simulation is getting bigger. Problems that a processor such as CPU or GPU cannot perform the simulation due to the massive size of matrix or a computer consist of multiple processors cannot handle a massive FDTD may come up. For those problems, studies are performed with parallel/distributed computing. However, in the past, only single type of processor was used. In GPU's case, it performs fast, but at the same time, it has limited memory. On the other hand, in CPU, it performs slower than that of GPU. To solve the problem, we implemented a computing model that can handle any FDTD simulation regardless of size on the cluster which consist of heterogeneous processors. We tested the simulation on processors using MPI libraries which is based on 'point to point' communication and verified that it operates correctly regardless of the number of node and type. Also, we analyzed the performance by measuring the total execution time and specific time for the simulation on each test.