• The Journal of Korean Institute of Communications and Information Sciences
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• v.25 no.4A
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• pp.566-572
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• 2000

In the receiver of optical communication systems, a demultiplexer converts to a single data stream with a highbit rate into several parallel data streams with a low bit rate. In this paper, we design a 1:4 demultiplexer using SiGe HBT with emitter size of 2x8um² The operation speed is 10Gbps, the rise and fall times of 20-80% are37ps and 36ps, respectively and the dissipation of power is 1.40W.

• Journal of the Korean Institute of Intelligent Systems
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• v.11 no.6
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• pp.500-504
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• 2001

The present approach based on the genetic algorithm with improved selections of bonds was adopted to extract a bridged T equivalent circuit elements of $\times10\mu m^2$InGaP/GaAs HBT. the small-signal model parameters were extracted using the genetic algorithm from S-parameters measured at different frequencies under multiple forward-active biases, which demonstrate physically meaningful values and consistency. The agreement between the measured and modeled S-parameters is excellent over the frequency range of 2 to 26.5GHz.

• Journal of electromagnetic engineering and science
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• v.5 no.1
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• pp.8-13
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• 2005

The InGaP/GaAs hetero-junction bipolar transistor(HBT) monolithic voltage-controlled dielectric resonator oscillator(VCDRO) is first demonstrated for a Ku-band low noise block down-converter(LNB) system. The on-chip voltage control oscillator core employing base-collector(B-C) junction diodes is proposed for simpler frequency tuning and easy fabrication instead of the general off-chip varactor diodes. The fabricated VCDRO achieves a high output power of 6.45 to 5.31 dBm and a wide frequency tuning range of ]65 MHz( 1.53 $\%$) with a low phase noise of below -95dBc/Hz at 100 kHz offset and -115 dBc/Hz at ] MHz offset. A]so, the InGaP/GaAs HBT monolithic DRO with the same topology as the proposed VCDRO is fabricated to verify that the intrinsic low l/f noise of the HBT and the high Q of the DR contribute to the low phase noise performance. The fabricated DRO exhibits an output power of 1.33 dBm, and an extremely low phase noise of -109 dBc/Hz at 100 kHz and -131 dBc/Hz at ] MHz offset from the 10.75 GHz oscillation frequency.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.37 no.11
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• pp.17-22
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• 2000

A novel and robust direct parameter extraction method for hybrid-p equivalent circuit model of HBT is proposed. A new expression that can accurately resolve the base internal resistance from the measured S-parameters is derived, and it is not sensitive to the values of parasitic access inductance values. Based on the expression, six analytical expressions for the other parameters is developed and these expressions for hybrid-p equivalent circuit modeling ensure robust, fast, and reliable parameter extraction.

• JSTS:Journal of Semiconductor Technology and Science
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• v.7 no.4
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• pp.281-286
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• 2007

In this paper, sub-circuits for 24 GHz phase locked 100ps(PLLs) using $0.5{\mu}m$ SiGe HBT are presented. They are 24 Ghz voltage controlled oscillator(VCO), 24 GHz to 12 GHz regenerative frequency divider(RFD) and 12 GHz to 1.5 GHz static frequency divider. $0.5{\mu}m$ SiGe HBT technology, which offers transistors with 90 GHz fMAX and 3 aluminum metal layers, is employed. The 24 GHz VCO employed series feedback topology for high frequency operation and showed -1.8 to -3.8 dBm output power within tuning range from 23.2 GHz to 26 GHz. The 24 GHz to 12 GHz RFD, based on Gilbert cell mixer, showed 1.2 GHz bandwidth around 24 GHz under 2 dBm input and consumes 44 mA from 3 V power supply including I/O buffers for measurement. ECL based static divider operated up to 12.5 GHz while generating divide by 8 output frequency. The static divider drains 22 mA from 3 V power supply.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.5 no.4
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• pp.367-370
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• 2004

We fabricated SiGe BiCMOS devices, which are important for ultra high speed RF IC chips, by employing $0.35\mu{m}$ CMOS process. To meet with the requirement of low noise level with linear base leakage current at low VBE region, we try to minimize polysilicon/ silicon interface traps by optimizing capping silicon thickness and EDR(emitter drive-in RTA) temperature. We employed $200\AA$and $300\AA$-thick capping silicon, and varied the EDR process condition at temperature of $900-1000^\circ{C}$, and time of 0-30 sec at a given capping silicon thickness. We investigated current gain behavior at each process condition. We suggest that optimum EDR process condition would be $975^\circ{C}$-30 sec with $300\AA$-thick capping silicon for proposed $0.35\mu{m}$-SiGe HBT devices.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2004.07b
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• pp.693-696
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• 2004

For InGaP/GaAs HBT applications, we have developed characterized MIM capacitors with thin $1000{\AA}$ PECVD silicon nitride which were deposited with $SiH_4/NH_3$ gas mixing rate, working pressure, and RF power of PECVD at $300^{\circ}C$ and had the capacitance density of 600 pF/$mm^2$ with the breakdown electric fields of 3073 MV/cm. Three PECVD process parameters were designed to lower the refractive index and then lower the deposition rate of silicon nitride films for the high breakdown electric field. At the PECVD process condition of gas mixing rate (0.92), working pressure (1.3 Torr), RF power (53 W), the AFM Rms value of about $1000{\AA}$ silicon nitride on the bottom metal was the lowest of 0.662 nmand breakdown electric fields were the highest of about 73 MV/cm.

• Computers and Concrete
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• v.26 no.6
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• pp.587-593
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• 2020

In this study, bond behavior of ordinary concrete and rebars with different diameters and development length was investigated by using Hinged Beam Test (HBT) and Eccentric Pull-Out Test (EPT) comparatively. For this purpose, three different rebar size and development length depending on rebar diameter were chosen as variables. Three specimens were produced for each series of specimens and totally 54 specimens were tested. At the end of the tests it was observed that obtained results for both tests were quite similar. On the other hand, increased bar size, especially for the specimen with 14 mm bar size and 14 development length (lb), caused shear failure of test specimens. This situation infers that when bigger bar size and lb are used in such test, dimensions of test specimens should be chosen bigger and stirrups should be used for producing of test specimens to obtain more adequate result by preventing shear failure. Also, a nonlinear regression analysis was employed between HBT and EPT results. There was a high correlation between the EPT values, lb, rebar diameters and estimated theoretical HBT. In addition, at the end of the study an equation was suggested to estimate bond strength for HBT by using EPT results.

• Journal of the Korean Institute of Telematics and Electronics D
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• v.36D no.3
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• pp.66-74
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• 1999

InAlGaAs/InGaAs HBTs with the various emitter junction gradings(xf=0.0-1.0) and the modified collector structures (collector- I;n-p-n, collector-II;i-p-n) are simulated and analyzed by HMC (Hybrid Monte Carlo) method in order to find an optimum structure for the shortest transit time. A minimum base transit time($ au$b) of 0.21ps was obtainsed for HBT with the grading layer, which is parabolically graded from $x_f$=1.0 and xf=0.5 at the emitter-base interface. The minimum collector transit time($\tau$c) of 0.31ps was found when the collector was modified by inserting p-p-n layers, because p layer makes it possible to relax the electric field in the i-type collector layer, confining the electrons in the $\Gamma$-valley during transporting across the collector. Thus InAlGaAs/InGaAs HBT in combination with the emitter grading($x_f$=0.5) and the modified collector-III showed the transit times of 0.87 psec and the cut-off frequency (f$\tau$) of 183 GHz.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.32 no.5A
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• pp.497-502
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• 2007

Broadband monolithic SiGe HBT variable gain amplifier with a feedforward configuration have been newly developed to improve bandwidth and dB-linearly controlled gain characteristics. The VGA has been implemented in a $0.35-{\mu}m$ BiCMOS process. The VGA achieves a dynamic gain-control range of 19.6 dB and a 3-dB bandwidth of 4 GHz ($4{\sim}8\;GHz$) with the control-voltage range from 0.6 to 2.6 V. The VGA produces a maximum gain of 9.3 dB at 6 GHz and a output power of -3 dBm at 8 GHz.