• Title/Summary/Keyword: H.264 Decoder

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Hardware Design Useing the SVC (SVC를 이용한 하드웨어 설계)

  • Lee, Jung-Sik;Gil, Dea-Nam;Cheong, Cha-Keon
    • Proceedings of the IEEK Conference
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    • 2008.06a
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    • pp.1029-1030
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    • 2008
  • The Scalable Video Coding(SVC) extention of H.264/AVC standard. SVC based temporal, spatial, snd qualty scalability of video bit streams. In this paper, we will develop C-model program and hardware circuits for the chip design of the SVC decoder. In order to acquire the flexibility of the circuit design and reliability of the hardware system development. In these development, we utilize the results of the C-model program to achieve the independencies of each sub-blocks and check the efficiencies of the circuit design results.

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A New LDPC Decoding Method of Error Correction Decoder for Distributed Video Coding (분산 동영상 압축 기법에 사용되는 LDPC 부호의 새로운 복호화 기법)

  • Lee, Sangwoo;Jang, Hwanseok;Park, Sang Ju
    • Proceedings of the Korean Society of Broadcast Engineers Conference
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    • 2011.11a
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    • pp.229-231
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    • 2011
  • H.264/AVC와 같은 동영상 압축 기술은 동영상의 압축에 필요한 연산이 대부분 부호기에서 이루어진다. 반면에 분산 동영상 압축 기법은 정보 압축에 필요한 연산이 대부분 복호기에서 수행되는 구조를 가진다. 본 논문에서는 분산 동영상 압축 기법의 구성 요소 중 오류 정정 부호기와 복호기에 사용되는 오류 정정 부호 중 LDPC 부호의 성능을 향상 시킬 수 있는 새로운 복호 기법을 제안한다. 제안하는 기법을 적용하여 추가적인 연산 없이 LDPC 부호의 오류 정정 성능을 향상시킬 수 있었다.

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Parallelization Method of Slice-based video CODEC (슬라이스 기반 비디오 코덱 병렬화 기법)

  • Nam, Jung-Hak;Ji, Bong-Il;Jo, Hyun-Ho;Sim, Dong-Gyu;Cho, Dae-Sung
    • Journal of the Institute of Electronics Engineers of Korea SP
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    • v.47 no.6
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    • pp.48-56
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    • 2010
  • Recently, we need to dramatically speed up real-time video encoding and decoding on mobile devices because complexity of video CODEC is significantly increasing along with the demand for multimedia service of high-quality and high-definition videos by users. A variety of research is conducted for parallelism of video processing using newly developed multi-core platforms. In this paper, we propose a method of parallelism based on slice partition of video compression CODEC. We propose a novel concept of a parallel slice for parallelism and propose a new coding order to be adequate to the parallel slice which keeps high coding efficiency. To minimize synchronization time of multiple parallel slices, we also propose a synchronization method to determinate whether the parallel slice could be independently decoded or not. Experimental results shows that we achieved 27.5% (40.7%) speed-up by parallelism with bit-rate increase of 3.4% (2.7%) for CIF sequences (720p sequences) by implementing the proposed algorithm on the H.264/AVC.

Efficient Coding of Motion Vector Predictor using Phased-in Code (Phased-in 코드를 이용한 움직임 벡터 예측기의 효율적인 부호화 방법)

  • Moon, Ji-Hee;Choi, Jung-Ah;Ho, Yo-Sung
    • Journal of Broadcast Engineering
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    • v.15 no.3
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    • pp.426-433
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    • 2010
  • The H.264/AVC video coding standard performs inter prediction using variable block sizes to improve coding efficiency. Since we predict not only the motion of homogeneous regions but also the motion of non-homogeneous regions accurately using variable block sizes, we can reduce residual information effectively. However, each motion vector should be transmitted to the decoder. In low bit rate environments, motion vector information takes approximately 40% of the total bitstream. Thus, motion vector competition was proposed to reduce the amount of motion vector information. Since the size of the motion vector difference is reduced by motion vector competition, it requires only a small number of bits for motion vector information. However, we need to send the corresponding index of the best motion vector predictor for decoding. In this paper, we propose a new codeword table based on the phased-in code to encode the index of motion vector predictor efficiently. Experimental results show that the proposed algorithm reduces the average bit rate by 7.24% for similar PSNR values, and it improves the average image quality by 0.36dB at similar bit rates.

Motion Vector Coding using Decoder-side Estimation (복호화기 측의 예측을 이용한 움직임 벡터 부호화)

  • Won, Kwang-Hyun;Yang, Jung-Youp;Jeon, Byeung-Woo
    • Proceedings of the Korean Society of Broadcast Engineers Conference
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    • 2008.11a
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    • pp.131-134
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    • 2008
  • H.264/AVC 부호화 표준은 움직임 벡터를 부호화하기 위해 인접 블록이 가지는 다수의 움직임 벡터 중에서 확률적으로 해당 움직임 벡터와 가장 유사한 중간값을 예측 움직임 벡터로 사용한다. 이러한 방법은 다수의 움직임 벡터 중에서 어떤 움직임 벡터가 예측값으로 사용되었는지에 대한 추가 정보 없이 비트량을 효과적으로 감소시킬 수 있는 장점이 있으나, 중간값을 이용한 예측 움직임 벡터는 해당 움직임 벡터를 부호화하는데 소요되는 비트량을 항상 최소로 만드는 최적 예측값이 아니라는 단점이 있다. 이러한 문제를 해결하기 위해 다수의 인접 블록이 가지는 움직임 벡터 중에서 특정 움직임 벡터가 예측값으로 사용되었는지 표현하는 정보를 복호화기에 알려주도록 하여 항상 최적의 예측 움직임 벡터를 선택함으로써 부호화 효율을 향상시킬 수 있으나, 이에 대한 추가 정보를 부호화해야 하는 문제점이 발생하게 된다. 본 논문에서는 부호화기가 부호화 효율 측면에서 가장 우수한 움직임 벡터를 예측값으로 선택하고, 이를 복호화기가 스스로 예측함으로써 인접 블록이 가지는 다수의 움직임 벡터 중에서 특정 움직임 벡터가 예측값으로 사용되었는지에 대한 정보없이 움직임 벡터 부호화에 소요되는 비트량을 효과적으로 감소시키는 움직임 벡터 부호화 방법을 제안한다. 제안한 부호화기는 율-왜곡 측면에서 가장 우수한 예측 움직임 벡터를 선택하고, 복호화기는 부호화기가 선택한 예측 움직임 벡터를 정합 기술을 사용하여 스스로 예측한다. 실험 결과는 제안 방법이 QCIF 및 CIF 영상에서 약 2.2%의 전체 비트량을 감소시킬 수 있음을 보여준다.

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BLOCK-BASED ADAPTIVE BIT ALLOCATION FOR REFENCE MEMORY REDUCTION

  • Park, Sea-Nae;Nam, Jung-Hak;Sim, Dong-Gy;Joo, Young-Hun;Kim, Yong-Serk;Kim, Hyun-Mun
    • Proceedings of the Korean Society of Broadcast Engineers Conference
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    • 2009.01a
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    • pp.258-262
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    • 2009
  • In this paper, we propose an effective memory reduction algorithm to reduce the amount of reference frame buffer and memory bandwidth in video encoder and decoder. In general video codecs, decoded previous frames should be stored and referred to reduce temporal redundancy. Recently, reference frames are recompressed for memory efficiency and bandwidth reduction between a main processor and external memory. However, these algorithms could hurt coding efficiency. Several algorithms have been proposed to reduce the amount of reference memory with minimum quality degradation. They still suffer from quality degradation with fixed-bit allocation. In this paper, we propose an adaptive block-based min-max quantization that considers local characteristics of image. In the proposed algorithm, basic process unit is $8{\times}8$ for memory alignment and apply an adaptive quantization to each $4{\times}4$ block for minimizing quality degradation. We found that the proposed algorithm could improve approximately 37.5% in coding efficiency, compared with an existing memory reduction algorithm, at the same memory reduction rate.

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Latent Shifting and Compensation for Learned Video Compression (신경망 기반 비디오 압축을 위한 레이턴트 정보의 방향 이동 및 보상)

  • Kim, Yeongwoong;Kim, Donghyun;Jeong, Se Yoon;Choi, Jin Soo;Kim, Hui Yong
    • Journal of Broadcast Engineering
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    • v.27 no.1
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    • pp.31-43
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    • 2022
  • Traditional video compression has developed so far based on hybrid compression methods through motion prediction, residual coding, and quantization. With the rapid development of technology through artificial neural networks in recent years, research on image compression and video compression based on artificial neural networks is also progressing rapidly, showing competitiveness compared to the performance of traditional video compression codecs. In this paper, a new method capable of improving the performance of such an artificial neural network-based video compression model is presented. Basically, we take the rate-distortion optimization method using the auto-encoder and entropy model adopted by the existing learned video compression model and shifts some components of the latent information that are difficult for entropy model to estimate when transmitting compressed latent representation to the decoder side from the encoder side, and finally compensates the distortion of lost information. In this way, the existing neural network based video compression framework, MFVC (Motion Free Video Compression) is improved and the BDBR (Bjøntegaard Delta-Rate) calculated based on H.264 is nearly twice the amount of bits (-27%) of MFVC (-14%). The proposed method has the advantage of being widely applicable to neural network based image or video compression technologies, not only to MFVC, but also to models using latent information and entropy model.

Dynamic Full-Scalability-Conversion in SVC (스케일러블 비디오 코딩에서의 실시간 스케일러빌리티 변환)

  • Lee, Dong-Su;Bae, Tae-Meon;Ro, Yong-Man
    • Journal of the Institute of Electronics Engineers of Korea CI
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    • v.43 no.6 s.312
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    • pp.60-70
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    • 2006
  • Currently, Scalable Video Coding (SVC) is being standardized. By using scalability of SVC, QoS managed video streaming service is enabled in heterogeneous networks even with only one original bitstream. But current SVC is insufficient to dynamic video conversion for the scalability, thereby the adaptation of bitrate to meet a fluctuating network condition is limited. In this paper, we propose dynamic full-scalability conversion method for QoS adaptive video streaming in H.264/AVC SVC. To accomplish full scalability dynamic conversion, we propose corresponding bitstream extraction, encoding and decoding schemes. On the encoder, we newly insert the IDR NAL to solve the problems of spatial scalability conversion. On the extractor, we analyze the SVC bitstream to get the information which enable dynamic extraction. By using this information, real time extraction is achieved. Finally, we develop the decoder so that it can manage changing bitrate to support real time full-scalability. The experimental results showed that dynamic full-scalability conversion was verified and it was necessary for time varying network condition.

Real-time Stereo Video Generation using Graphics Processing Unit (GPU를 이용한 실시간 양안식 영상 생성 방법)

  • Shin, In-Yong;Ho, Yo-Sung
    • Journal of Broadcast Engineering
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    • v.16 no.4
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    • pp.596-601
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    • 2011
  • In this paper, we propose a fast depth-image-based rendering method to generate a virtual view image in real-time using a graphic processor unit (GPU) for a 3D broadcasting system. Before the transmission, we encode the input 2D+depth video using the H.264 coding standard. At the receiver, we decode the received bitstream and generate a stereo video using a GPU which can compute in parallel. In this paper, we apply a simple and efficient hole filling method to reduce the decoder complexity and reduce hole filling errors. Besides, we design a vertical parallel structure for a forward mapping process to take advantage of the single instruction multiple thread structure of GPU. We also utilize high speed GPU memories to boost the computation speed. As a result, we can generate virtual view images 15 times faster than the case of CPU-based processing.

Adaptive Combination of Intra/Inter Predictions in JM KTA Software (JM KTA 소프트웨어에서 인트라 및 인터 예측블록이 혼합된 코딩 방법)

  • Kim, Min-Jae;Seo, Chan-Won;Jang, Myung-Hun;Han, Jong-Ki
    • Journal of Broadcast Engineering
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    • v.16 no.2
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    • pp.190-206
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    • 2011
  • We propose an adaptive combination scheme of intra and inter prediction modes, where uni-directional intra prediction, bi-directional intra prediction, and inter prediction method are adaptively selected in an EMB (extended macro block). For each EMB, after all inter blocks have been encoded and decoded, the reconstructed blocks are used as reference data for bi-directional intra prediction of other blocks. Whereas conventional intra coding scheme does not use the right and below side pixels of the current block as reference data, the proposed method uses those for bi-directional intra prediction mode. In this paper, we propose three advanced techniques; (a) filter design for bi-directional prediction, (b) adaptive coding order scheme which increases the chance to use the bi-directional intra prediction mode, (c) modification of syntax to represent coding order. The information for the coding order is informed to the decoder by using the modified syntax structure without adding any additional flag. The simulation results show that the proposed scheme reduces the BD-Rate by 0.5%, on average, compared to KTA.