• Journal of the Institute of Electronics Engineers of Korea CI
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• v.40 no.4
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• pp.214-221
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• 2003

This paper shows an implementation of video codec (coder/decoder) on an embedded system. The video codec supports both H.261 and H.263 standards. For efficient real-time processing, the video codec is partitioned into a software module and a hardware module. Both modules are codesigned on an embedded system. The software module is processed on a real-time operating system and a RISC processor. It cooperates with the hardware module to compress and decompress images in real time. AMBA (Advanced Microcontroller Bus Architecture) AHB (Advanced High-performance Bus) is used as the system bus. The hardware module works both as AHB masters and as AHB slaves. The encoder part of the hardware module operates in a pipelines mode to compress images in real time. The video codec compresses 15 CIF frames and simultaneously decompresses 15 CIF frames in a second according to H.261 or H.263 standard at 33 MHz frequency.

• Proceedings of the Korean Society of Broadcast Engineers Conference
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• 1998.06b
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• pp.5-9
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• 1998

In this paper, we propose an error-resilient transmission technique for the H.263 video data stream over wireless networks. The proposed algorithm employs bit rearrangement hierarchically, providing the robust and exact synchronization against the bit errors, without requiring extra redundant information. In addition, we propose the recovery algorithm for the lost or erroneous motion vectors. We implement the encoder and decoder, based on the H.263 standard, and evaluate the proposed algorithm through intensive computer simulation. The experimental results demonstrate that the proposed algorithm yields good image quality, in spite of the channel errors, and prevents the error propagation both in the spatial and the temporal domain efficiently.

• Journal of the Korean Institute of Telematics and Electronics S
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• v.35S no.5
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• pp.94-102
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• 1998

In this paper, we proposed a dynamic selection scheme of advnaced prediction mode(DAPM), which reduces computational cost and improves coding efficiency. We can select the mode between default prediction mode (DPM) and advanced prediction mode (APM) according to motion componenets in a frame dynamically. For this purpose, we defined error distribution of motion estimation (EDME) as sum of absolute difference(SAD) for each searching points. This distribution region is divided to four subregions. We calculate minimum values in each subregions and then, we determine whether block motion estimation is performed or not depending on the results. As a result, we reduced computational complexity to 30% without degradation of image quality compared to fixed APM(FAPM) by selecting DPM for linear movement.

• The Journal of the Korea Contents Association
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• v.7 no.12
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• pp.262-272
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• 2007

SAD (Sum of Absolute Difference) algorithm is the most frequently executing routine in motion estimation, which is the most demanding process in motion picture encoding. To enhance the performance of motion picture encoding on a VLIW processor, an optimal implementation of SAD algorithm on VLIW processor should be accomplished. In this paper, we propose an implementation of optimal scheduling of SAD algorithm with conditional branch on a VLIW-based high performance DSP. We first transform the nested loop with conditional branch of SAD algorithm into a single loop with conditional branch which has a large enough loop body to utilize fully the ILP capability of VLIW DSP and has a conditional branch to make the escape from loop to be achieved as soon as possible. And then we apply a modulo scheduling technique to the transformed single loop. We test the proposed implementation on TMS320C6713, and analyze the code size and performance with respect to processing time. Through experiments, it is shown that the SAD implementation proposed in this paper has small code size appropriate for embedded applications, and the H.263 encoder with the proposed SAD implementation performs better than other H.263 encoder with other SAD implementations.

• Proceedings of the IEEK Conference
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• 2005.11a
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• pp.565-568
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• 2005

Even though there has been a great deal of research and development for the compression techniques such as H.263, MPEG-1, and MPEG-2 in DVR systems, an efficient scheme for storing, accessing, and managing the huge amount of video data from multi-channel cameras needs to be developed. In this paper, we describe an implementation of MPEG-4 encoder for PC-based real-time multi-channel DVR systems.

• Proceedings of the Korea Multimedia Society Conference
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• 2003.11a
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• pp.175-178
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• 2003

최근에 표준화가 완료된 차세대 비디오 코딩 표준인 H.264 는 적은 비트율에서 높은 품질의 비디오 압축을 목표로 하기 때문에, H.263+ 및 MPEG-2/4 와 같은 이전의 표준들보다 훨씬 더 많은 연산을 필요로 한다. 본 논문은 SIMD (Single Instruction Multiple Data) 명령어를 가지는 범용 프로세서(예를 들면, 펜티엄 4)에서 H.264 S/W 인코더의 속도 최적화를 위한 알고리듬 및 구현 기술을 제안한다. 화질 저하 없이 RDO (Rate Distortion Optimization) 의 속도를 높일 수 있는 효율적인 모드 검색 건너뛰기 알고리듬을 제안하고, SIMD 명령어를 이용하여 1/4 화소 보간, SAD(Sum of Absolute Difference), SATD(Sum of Absolute Transformed Difference), SSD (Sum of Squared Difference) 등의 개별 루틴의 속도를 최적화한다. 일련의 최적화 후에 인코더는 화질 저하 없이 H.264 레퍼런스 인코더보다 평균 3배 정도의 속도 향상이 이루어진다.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.29 no.6C
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• pp.842-847
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• 2004

We present a new video coding technique to tradeoff frame rate and picture quality for low bit rate video coding. We show a model equation for selecting the optimal frame rate from the motion content of the source video. We can determine DCT quantization parameter (QP) using the frame rate and bit rate. For objective video quality measurement we propose a simple and effective error measure for skipped frames. The proposed method enhances the video quality up to 2 ㏈ over the H.263 TMN5 encoder.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.26 no.11A
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• pp.1880-1888
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• 2001

In wireless communication systems, transmission errors degrade the reconstructed image quality severely. Among various techniques which reduce the degradation, the error concealment technique yields good performance without overheads and the modification of the encoder. In this paper, we have proposed the technique for recovering the corrupted motion vector using the edge direction of blocks which surround the corrupted block, when the video information is compressed by H.263 standard. We uses the property that each object in video sequences shows the same motion. For the estimation of edge directions, the first AC coefficients of blocks are used. Extensive simulation results show that the proposed technique yields good performance with a reduced computational complexity.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.23 no.9A
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• pp.2372-2382
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• 1998

In this paper, we propose a new edge based finite state vector quantization method having better performance than conventional side-match finite state vector quantization. In our proposed scheme, each dCT transformed block is classified to 17 classes according to edge types. Each class has a different codebook based on its characteristis. Encoder classified each block to motion block or stationary block and constructed a merging map by using edge and motion information, and sent to decoder. We controled amoutn of bing bits transmitted with selecting modes accoridng to bandwidth of transmitting channel. Compared with conventional algorithms, H.263 and H.261 at low bit rate, our proposed algorithm shows better picture quality and good performance.

• Proceedings of the Korean Society of Broadcast Engineers Conference
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• 2004.11a
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• pp.113-116
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• 2004

T-DMB 서비스의 경우 무시할 수 없는 빈도로 자주 전송 오류가 발생할 가능성이 있으므로, 내부 비디오 코덱인 H.264/AVC는 이 전송 오류에 의한 영향을 극복하기 위한 방안을 갖추도록 설계되어야 한다. 본 논문은 이 경우에 대비하여, 오류 내성이 있는 새로운 부호화 모드 결정 기법을 제안한다. WCDMA 채널을 통한 전송 시뮬레이션을 통하여, 제안하는 부호화 모드 결정 기법을 적용하는 경우 오류 내성을 고려하지 않고 부호화 모드를 결정하는 경우에 비해서 고-복잡도의 경우에는 평균적으로 0.77dB, 저-복잡도의 경우에는 0.35dB의 재생화질 개선 효과가 있음을 보였다. 고-복잡도 부호화 모드 결정 기법의 경우는 H.263에서 제시된 고-복잡도 부호화 모드 결정 기법에 비해서 평균적으로 0.l1dB 개선된 값이다.