• ETRI Journal
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• v.34 no.4
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• pp.633-636
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• 2012

A dynamic analysis of an amorphous silicon (a-Si) thin film transistor liquid crystal display (TFT-LCD) pixel is presented using new a-Si TFT and liquid crystal (LC) capacitance models for a Simulation Program with Integrated Circuit Emphasis (SPICE) simulator. This dynamic analysis will be useful when predicting the performance of LCDs. The a-Si TFT model is developed to accurately estimate a-Si TFT characteristics of a bias-dependent gate to source and gate to drain capacitance. Moreover, the LC capacitance model is developed using a simplified diode circuit model. It is possible to accurately predict TFT-LCD characteristics such as flicker phenomena when implementing the proposed simulation model.

• Proceedings of the KIEE Conference
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• 1991.11a
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• pp.249-252
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• 1991

I-V characteristics of LIGBT is studied by SPICE simulation which includes device parameters and process parameters. Analysis and modeling of ON-resistance are discussed in this paper. Compare with experimental values, SPICE simulation and modeling results show that our simulation is valid for LIGBT.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2002.05b
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• pp.124-127
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• 2002

A CMOS voltage regulation circuit for use at low-voltage is proposed. Circuits for a positive and for a negative current regulation are presented and are designed with commercial CMOS technology. The voltage regulation that is stable over ambient temperature variations is an important component of most data acquisition systems. These results are verified by the H-SPICE simulation $0.8{\mu}m$ parameter. As the result, the temperature dependency of output voltage is $0.57mV/^{\circ}C$ and the power dissipation is 1.8 mV on 5V supply voltage.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.41 no.5
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• pp.43-48
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• 2004

A PWM Circuit using CMOS OTA is proposed. It features that the oscillation frequency is independent of supply voltage and temperature, and is linearly controlled by the bias current of OTA. The H-SPICE simulation results are given and they show good performance of the proposed circuit. The layout results using 0.3${\mu}{\textrm}{m}$ CMOS technology for IC implementation are also given.

• Proceedings of the KIPE Conference
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• 2001.10a
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• pp.644-649
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• 2001

This paper proposes a soft-switching current -source inverter for photovoltaic power system, which has an H-type switched-capacitor module composed of two semiconductor switches, two diodes, and an L-C resonant circuit. The operation of proposed system was analyzed by a theoretical approach with equivalent circuits and verified by computer simulations with SPICE and experimental works with a hardware prototype. The proposed system could be effectively applied for the power converter of photovoltaic power system interconnected with the power system.

• The Transactions of the Korean Institute of Electrical Engineers B
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• v.50 no.8
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• pp.402-407
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• 2001

This paper proposes a soft-switching current source inverter for photovoltaic power system, which has an H-type switched-capacitor module composed of two semiconductor switches, two diodes , and an L-C resonant circuit. The operation of proposed system was analyzed by a theoretical approach with equivalent circuits and verified by computer simulations with SPICE. The feasibility of hardware implementation was verified by experimental works with a prototype. The proposed system could by effectively applied for the photovoltaic power system with high efficiency.

• KIEE International Transaction on Electrical Machinery and Energy Conversion Systems
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• v.3B no.1
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• pp.37-43
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• 2003

This paper proposes a soft-switching current source inverter for a photovoltaic power system. The proposed inverter has an H-type switched-capacitor module composed of two semiconductor switches, two diodes, and an LC resonant circuit. The operation of the proposed system was analyzed by a theoretical approach with equivalent circuits and was verified by computer simulations with SPICE and experimental implementation with a hardware prototype. The proposed system could be effectively applied for the power converter of photovoltaic power system interconnected with the AC power system.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.38 no.2
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• pp.38-49
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• 2001

This paper presents a new voltage down converter(VDC) using charge and discharge current adjustment circuitry that provides high frequency application. This VDC consist of a common driving circuit and compensation circuits: 2 sensors and each driving transistors for controlling gate current of driving transistor. These sensors are operated as adaptive biasing method with high speed and low power consumption. This circuit is designed with a $0.62{\mu}m$ N well CMOS technology. In H-spice simulation results, internal voltage is bounded ( IV, +0.6V) in proposed circuitry when load current rapidly increases and decreases during Gns between 0 and $200m{\Lambda}$. And the recovery time of internal voltage is about 7ns and 10ns when load current increases and decreases respectively. That is fast better than common driving circuit. Total power consumption is about 1.2mW.

• Journal of Information Display
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• v.6 no.2
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• pp.12-15
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• 2005

We propose a new pixel design for active matrix organic light emitting diode (AM-OLED) displays using hydrogenated amorphous silicon thin-film transistors (a-Si:H TFTs). The pixel circuit is composed of five TFTs and one capacitor, and employs only one additional control signal line. It is verified by SPICE simulation results that the proposed pixel compensates the threshold voltage shift of the a-Si:H TFTs and OLED.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.33 no.10C
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• pp.798-804
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• 2008

This paper proposes a low-power circuit for detecting and correcting L2 cache errors during microprocessor data image processing. A simplescalar-ARM is used to analyze input and output data by accessing the microprocessor's L2 cache during image processing in terms of the data input and output frequency as well as the variation of each bit for 32-bit processing. The circuit is implemented based on an H-matrix capable of achieving low power consumption by extracting bits with small and large amounts of variation and allocating bits with similarities in variation. Simulation is performed using H-spice to compare power consumption of the proposed circuit to the odd-weight-column code used in a conventional microprocessor. The experimental results indicated that the proposed circuit reduced power consumption by 17% compared to the odd-weight-column code.