• Journal of Korean Port Research
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• v.5 no.2
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• pp.39-63
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• 1991

A PC-based ship maneuvering simulator was developed which was configured in a high performance IBM PC compatible i486 and i286 computer with a TMS 340 graphic signal processor and 10 MBPS Ethernet Cards. A real-time ship maneuvering simulation program was developed which includes computer generated imagery (CGI) for bird's eye view type and perspective view type. The simulator H/W was designed and manufactured and S/W for interface of various navigation equipments was made Especially, programs for output, analysis, and assessment of simulations results were developed. Communications between PC's are made by using Ethernet bus type LAN system. Simulations could be performed under various environments (current, wind, wave etc.) using data base of harbors and ships. This system can be used for various purposes such as crew's training, harbor and waterway design, and assessment of ship maneuverability in harbor.

• The Journal of the Acoustical Society of Korea
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• v.40 no.5
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• pp.523-529
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• 2021

In this paper, we designed and developed an Emotional Speech Synthesis Markup Language (SSML) processor. Multi-speaker emotional speech synthesis technology that can express multiple voice colors and emotional expressions have been developed, and we designed Emotional SSML by extending SSML for multiple voice colors and emotional expressions. The Emotional SSML processor has a graphic user interface and consists of following four components. First, a multi-speaker emotional text editor that can easily mark specific voice colors and emotions on desired positions. Second, an Emotional SSML document generator that creates an Emotional SSML document automatically from the result of the multi-speaker emotional text editor. Third, an Emotional SSML parser that parses the Emotional SSML document. Last, a sequencer to control a multi-speaker and emotional Text-to-Speech (TTS) engine based on the result of the Emotional SSML parser. Based on SSML which is a programming language and platform independent open standard, the Emotional SSML processor can easily integrate with various speech synthesis engines and facilitates the development of multi-speaker emotional text-to-speech applications.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.4
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• pp.89-96
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• 2013

The graphic processor unit (GPU) has been developed to process not only graphic data but also general system data. It shows a better performance than CPU in algorithm for 3D graphics and parallel program. In order to execute algorithm for CPU on GPU, we should understand about GPU architectures and rewrite program considering parallel processing capability and new memory model of GPU. For this reasons, a performance prediction model for the algorithm and its predicted performance through GPU system are required. These can predict problems in GPU application development or construct a performance evaluation standard for GPU. In this paper, we applied the AES encryption algorithms on our performance model and accomplished performance prediction with high accuracy under a heavy workload.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.8
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• pp.61-66
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• 2008

Recently, portable devices which require small area and low power consumption employ applications using 3D graphics such as 3D games and 3D graphical user interfaces. We propose an efficient clipping engine algorithm which is suitable in 3D graphics pipeline. The clipping operation is divided into two steps: one is the selection process in the transformation engine and the other is the pixel clipping process in the scan conversion unit. The clipping operation is possible with addition of simple comparator. The clipping for the Y-axis is achieved in the edge walk stage and that for the X and Z-axis is performed in the span processing. The proposed clipping algorithm reduces the operation cycles and the area of of 3D graphics pipelines. We designed a 3D graphics pipeline with the proposed clipping algorithm using Verilog-HDL and verifies the operation using an FPGA.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.3
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• pp.20-25
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• 2009

We propose hardware architecture of floating-point square root and inverse square root arithmetic units using lookup tables. They are used for lighting engines and shader processor for 3D graphic processing. The architecture is based on Taylor series expansion and consists of lookup tables and correction units so that the size of look-up tables are reduced. It can be applied to 32 bit floating point formats of IEEE-754 and reduced 24 bit floating point formats. The square root and inverse square root arithmetic units for 32 bit and 24 bit floating format number are designed as the proposed architecture. They can operation in a single cycle, and satisfy the precision of $10^{-5}$ required by OpenGL 1.x ES. They are designed using Verilog-HDL and the RTL codes are verified using an FPGA.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.37 no.5
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• pp.66-76
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• 2000

This paper describes design and implementation of caption-processing ASIC(Application Specific Integrated Circuits) for OSD(On Screen Display) of karaoke system. The OSD of conventional karaoke system was implemented by a general purpose DSP, however this paper suggest a design to save hardware resources. The ASIC receives commands and data of graphic and caption from host processor, and then modifies the data to have various graphic effects. The design has been done by schematic and VHDL coding. The design was verified by logic simulation and FPGA emulation on the real system. The chip was fabricated with 0.8${\mu}{\textrm}{m}$ CMOS SOG, and worked properly at the karaoke system.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2008.05a
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• pp.209-212
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• 2008

During several years, lots of industrial and individual products have been developed based on the text or graphic LCD module which has been gave the short developing period to the developer. With the advent of home networks and intelligent robots, the need for interaction between human and instruments has been increased. Recently, goods with a TFT-LCD come out. But in spite of a simple required performance, the complicated microprocessor, such as ARM processor, is required to interface the TFT-LCD and touch screen. Our research and development is to develope an embedded TFT-LCD module in order to use or apply to the goods through the simple interface by the general users as well as the developers. We adopt the RTOS(real time operating system) in order to operate TFT-LCD independently and various communication protocols are provided in order to offer the simple interface to users and developers.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.12 no.6
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• pp.2888-2897
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• 2011

The performance of a geothermal heat pump system using carbon dioxide was investigated by the steady-state cycle simulation program developed in this study. A parametric study was carried out in order to investigate the effect of various operating conditions on the performance of the basic cycle without an IHX(internal heat exchanger). The simulation program consists of several Fortran subroutines for simulating indoor and outdoor heat exchangers, compressors, and expansion valves and Visual Basic subroutines for the graphic user interface(GUI) consisted with pre-processor for input data and post-processor for the output data. Refprop V6.01 was used for estimating the thermodynamic properties and equilibrium behaviors of carbon dioxide. The simulation results were validated by comparing experimental data through a series of case studies. The cycle simulation program developed in this work would seem to be a useful tool in optimizing and establishing economical and efficient operating conditions in the $CO_2$ geothermal heat pump system.

• Proceedings of the Korean Society of Broadcast Engineers Conference
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• 2003.11a
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• pp.69-72
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• 2003

This paper presents a signal processing IC for digital HDTV, which is designed to operate in bunt-in HDW or in HD-set-top Box. The chip supports de-multiplexing an ISO/IEC 13818-1 MPEG-2 TS stream. It decodes MPEG-2 MP@HL video bitstream, and provides high-quality scaled video for display on HDTV monitor. The chip consists of ARM7TDMI for TS-Demux, PCI interface, Audio interface, MPEG2 MP@HL video decoder Display processor, Graphic processor, Memory controller, Audio int3face, Smart Card interface and UART. It is fabricated using Sam sung's 0.18-um and the package of 492-pin BGA is used.

• Journal of the Korea Society of Computer and Information
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• v.11 no.4 s.42
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• pp.35-45
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• 2006

RIn this paper. we describe real-time parallel processing simulator developed for the use of performance analysis of rolling missiles. The real-time parallel processing simulator developed here consists of seeker emulator generating infrared image signal on aircraft, real-time computer, host computer, system unit, and actual equipments such as auto-pilot processor and seeker processor. Software is developed according to the design requirements of mathematic model, 6 degree-of-freedom module, aerodynamic module which are resided in real-time computer. and graphic user interface program resided in host computer. The real-time computer consists of six TI C-40 processors connected in parallel. The seeker emulator is designed by using analog circuits coupled with mechanical equipments. The system unit provides interface function to match impedance between the components and processes very small electrical signals. Also real launch unit of missiles is interfaced to simulator through system unit. In order to use the real-time parallel processing simulator developed here as a performance analysis equipment for rolling missiles, we perform verification test through experimental results in the field.