• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.29 no.8
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• pp.455-460
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• 2016

A textured front surface is required in high efficiency silicon solar cells to reduce reflectance and to improve light trapping. Wet etching with alkaline solution is usually applied for mono crystalline silicon solar cells. However, alkali texturing method is not appropriate for multi-crystalline silicon wafers due to grain boundary of random crystallographic orientation. Accordingly, acid texturing method is generally used for multi-crystalline silicon wafers to reduce the surface reflectance. To reduce reflectivity of multi-crystalline silicon wafers, double texturing method with combination of acid and reactive ion etching is an attractive technical solution. In this paper, we have studied to optimize RIE condition by different RF power condition (100, 150, 200, 250, 300 W).

• Proceedings of the KIEE Conference
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• 1997.07d
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• pp.1277-1279
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• 1997

In this study, the mechanism underlying the corrosion problem have been investigated using X-ray photoelectron spectroscopy(XPS) and scanning electron microscopy(SEM), AES(Auger electron spectroscopy) In regard to the removal of Al-Cu corrsion, the subsequent treatment of the $SF_6$ plasma has also been completed. This work evaluated the effects of grain boundary on the AlCu after dry etching and the role of subsequent $SF_6$ plasma for the removal of AlCu corrosion.

• Journal of Welding and Joining
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• v.13 no.2
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• pp.12-24
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• 1995

Recently, more researches have been actively performed for the assessment of material degradation and residual-life of elevated temperature plant components, as some of domestic fossil power plants become older than 30 years. In this paper, results of on_site residual life assessment are reported for main steam pipes of Youngwol power station #2 which have operated since 1965. For critical weld locations such as butt welds branch welds, Y_sections and a T-section, replication technique and hardness measurement technique were employed for life_assessment. When cracks were detected by conventional NDT tests, crack growth life was calculated using a computer code. On the other hand, for matrix of pipes, residual life was quantitatively estimated by an analytic method and material degradation was estimated qualitatively using diameter measurement data and grain-boundary etching method. Also, direction in further improvement of on-site life assessment techniques are proposed.

• Proceedings of the Korean Vacuum Society Conference
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• 2010.02a
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• pp.38-38
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• 2010

Ever since the experimental discovery of graphene exfoiliated from the graphite flakes by Geim et at., this area has drawn a lot of attention for its possible application in IT industry. For the growth of graphene, chemical vapor deposition (CVD) has been widely used to fabricate the large area graphene. The lateral size of this graphene can be easily controlled by the size of the metal substrate though the chemical etching to remove this substrate is somewhat troublesome. Another problem which is hard to avoid is the folding at the grain boundary. We will discuss the origin of the folding first and introduce the way to avoid this folding. To solve this problem, we have used the various types of micro-thin metal foils. The precise control of hydro-carbon and the carrier gas results in the formation of the graphene on top of substrate. The thickness of graphene layers can be controlled with the control of gas flow on top of Cu substrate in contrast to the previously reported self-limiting growth $behavior^1$. Uniformity of this graphene layer has been checked by micro-raman spectroscopy and SEM. The size of grain can be enhanced by thermal treatment or use of other metal substrate. The dependence of grain size on the lattice size of the substrate will be discussed. By selecting the shape of substrate, we can grow various types of graphene. We will introduce the micron size graphene tube and its application.

• Korean Journal of Materials Research
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• v.6 no.3
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• pp.253-263
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• 1996

고온.고압하에서 장시간 사용되는 고온부재용 구조물은 경년열화현상을 나타낸다 그러므로 구조물의 안정성 측면에서 재질열화의 정도를 정량적으로 평가하는 것이 중요하다. 그러나 실기 구조물에서 채취할 시험편의 크기와 수는 제한이 되기 때문에 새로운 비파괴적인 평가법이 요구되고 있다. 따라서 본 연구에서는 화력발전설비에 이용되는 탄소강과 페라이트강에 대한 열화도의 평가를 위해 입계부식법의 적용 가능성을 조사한다. 시험결과, 재질열화의 정도는 사용시간보다 사용온도에 더 큰 영향을 받았으며, Larson-Miller인자와 열화도([$\Delta$DBTT]SP)사이의 관계는 선형적이었으나, 강종에 따라 다른 기울기를 보였다. 반면, 연성-취성천이온도 ([$\Delta$DBTT]SP)와 격자절단비(Ni/No)와 관계는 강종에 무관하게 선형적인 비례관계를 나타내었다. 또한, [$\Delta$DBTT]SP와 Ni/No 의 관계로부터 입계부식법은 페라이트계 강뿐만아니라 탄소강에 대해서도 유용한 재질열화 평가 방법임을 알 수 있었다.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.18 no.3
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• pp.231-236
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• 2005

To investigate the electrical properties at the single grainboundary of ZnO varistors, micro-electrodes were fabricated on the surface which was polished and thermally etched. Our micro-electrode had 2000 $\AA$ silicon nitride layer between micro-electrode and ZnO surface. This layer was deposited by PECVD and etched by RIE after photoresistor pattering process using by mask 1. The metal patterning of micro-electrodes used lift-off method. We found that the breakdown voltage of single grainboundary is about 3.5∼4.2 V at 0.1 mA on I-V curves. Also, capacitance-voltage measurement at single grainboundary gave several parameters( $N_{d}$, $N_{t}$, $\Phi$$_{b}$, t) which were related with grainboundary.ary.

• The Korean Journal of Ceramics
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• v.5 no.3
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• pp.230-234
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• 1999

Ti(CN)-0.3mole% $Mo_2C$ ceramics were prepared by pressureless sintering. $Mo_2C$ dissolved in Ti(CN) more easily in a nitrogen environment than in the other environment because nitrogen forced Mo to form a solid solution, (Ti, No)(C, N). A "core-rim" structure developed within the grains. The boundary between the "core" and the rim was delineated by thermal etching in the sample with more than 2 mole% $Mo_2C$. The rim thickness and the grain size decreased as the $Mo_2C$ content increased. The hardness and the flexural strength showed maxima of 18.2 GPa and 1.23 GPa, respectively when the $Mo_2C$ content was 2 mole%. The post-sintering heat treatments improved the properties.oved the properties.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.29A no.2
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• pp.55-62
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• 1992

Polycrystalline silicon ingots were manufactured using the casting method for polycrystalline silicon solar cells. These ingots were cut into wafers and ten n$^{+}$p type solar cells were made through the following simple process` surface etching, n$^{+}$p junction formation, metalization and annealing. For the grain boundary passivation, the samples were oxidized in O$_2$ for 5 min. at 80$0^{\circ}C$ prior to diffusion in Ar for 100 min. at 95$0^{\circ}C$. The conversion efficiency of polycrystalline silicon solar cells made from these wafers showed about 70-80% of those of the single crystalline silicon solar cell and superior conversion efficiency, compared to those of commercial polycrystalline wafers of Wacker Chemie. The maximum conversion efficiency of our wafers was indicated about 8%(without AR coating) in spite of such a simple fabrication method.

• Journal of the Korean institute of surface engineering
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• v.24 no.4
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• pp.187-195
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• 1991

Adhesion strength of electroless-plated Ni, Ni-P and Cu deposites on alumina substrate has been studied. Grain boundary spaces produced on the substrate surface by etching treatment provided anchoring sites for enhancing the adhesion strength. Adhesion strengths of Ni-P and Ni deposit were higher than that of Cu deposit, because of higher initial nucleation rates than the latter. The electroless-plated Ni-P and Ni underlayer improved the adhesion strength of the Cu deposit. In could be attributed to the enhanced adhesion between the substrate and those underlayers as well as the satisfactory adhesion between Cu deposits and those underlayers. Heat treatment was also conducted in order to enhance the adhesion strength of Cu layer. The strength was enhanced by about 19% when the treatment was conducted at $150^{\circ}C$ for 2 hours. The enhancement was attributed to relief of internal stress and release of hydrogen.

• Solar Energy
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• v.17 no.4
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• pp.3-11
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• 1997

Because grain boundaries in polycrystalline silicon act as potential barriers and recombination centers for the photo-generated charge carriers, these defects degrade conversion effiency of solar cell. To reduce these effects of grain boundaries, we investigated various influencing factors such as thermal treatment, various grid pattern, selective wet etching for grain boundaries, buried contact metallization along grain boundaries, grid on metallic thin film. Pretreatment above $900^{\circ}C$ in $N_2$ atmosphere, gettering by $POCl_3$ and Al treatment for back surface field contributed to obtain a high quality poly-Si. To prevent carrier losses at the grain boundaries, we carried out surface treatment using Schimmel etchant. This etchant delineated grain boundaries of $10{\mu}m$ depth as well as surface texturing effect. A metal AI diffusion into grain boundaries on rear side reduced back surface recombination effects at grain boundaries. A combination of fine grid with finger spacing of 0.4mm and buried electrode along grain boundaries improved short circuit current density of solar cell. A ultra-thin Chromium layer of 20nm with transmittance of 80% reduced series resistance. This paper focused on the grain boundary effect for terrestrial applications of solar cells with low cost, large area, and high efficiency.