• Proceedings of the KIEE Conference
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• 1996.11a
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• pp.91-94
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• 1996

A simulation procedure was developed for identifying Yungnam unit 2 excitation model parameters to improve the accuracy of stability simulation of KEPCO. First, generator model parameters are derived by using modified load rejection technique from measured load rejection test. For identifying excitation model parameters, switch was changed from MVR mode to AVR mode in Yungnam unit 2 excitation system instead of applying to a small step to the voltage reference($V_{ref}$) because of saving time and efforts, assuming the test result would show coincided result with applying to a small step to the $V_{ref}$. However, it was found that the response of switching from MVR to AVR is greatly different from it of applying small signal to the $V_{ref}$. A simulation procedure was needed to take into accounts of real AVR component status before and after switching from MVR to AVR. This paper reports the procedure which duplicated the measured response and addresses the merits of this test on conventional AVR step test.

• ETRI Journal
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• v.26 no.3
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• pp.229-240
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• 2004

This paper reports on our development of a dual-mode transceiver for a CMOS high-rate Bluetooth system-onchip solution. The transceiver includes most of the radio building blocks such as an active complex filter, a Gaussian frequency shift keying (GFSK) demodulator, a variable gain amplifier (VGA), a dc offset cancellation circuit, a quadrature local oscillator (LO) generator, and an RF front-end. It is designed for both the normal-rate Bluetooth with an instantaneous bit rate of 1 Mb/s and the high-rate Bluetooth of up to 12 Mb/s. The receiver employs a dualconversion combined with a baseband dual-path architecture for resolving many problems such as flicker noise, dc offset, and power consumption of the dual-mode system. The transceiver requires none of the external image-rejection and intermediate frequency (IF) channel filters by using an LO of 1.6 GHz and the fifth order onchip filters. The chip is fabricated on a $6.5-mm^{2}$ die using a standard $0.25-{\mu}m$ CMOS technology. Experimental results show an in-band image-rejection ratio of 40 dB, an IIP3 of -5 dBm, and a sensitivity of -77 dBm for the Bluetooth mode when the losses from the external components are compensated. It consumes 42 mA in receive ${\pi}/4-diffrential$ quadrature phase-shift keying $({\pi}/4-DQPSK)$ mode of 8 Mb/s, 35 mA in receive GFSK mode of 1 Mb/s, and 32 mA in transmit mode from a 2.5-V supply. These results indicate that the architecture and circuits are adaptable to the implementation of a low-cost, multi-mode, high-speed wireless personal area network.

• Transactions of the Korean Society of Mechanical Engineers A
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• v.40 no.9
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• pp.801-805
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• 2016

In this paper, engine clutch engagement shock is analyzed during the mode change of plug-in hybrid electric vehicles. Multi-driving mode includes the EV (electric vehicle) mode, HEV (hybrid electric vehicle) mode, and engine operating mode. Depending on the mode change, the engine clutch is either engaged or disengaged. The magnitude of shock during clutch engagement is very important because it impacts vehicle acceleration and clutch synchronization speed, which affects ride comfort substantially. The performance simulator of plug-in hybrid electric vehicles was developed using MATLAB/Simulink. The simulation results show that the mode change control algorithm is necessary for minimizing shock during clutch engagement.

• Journal of IKEEE
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• v.12 no.3
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• pp.176-183
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• 2008

The high efficiency power management IC(PMIC) with DTMOS(Dynamic Threshold voltage MOSFET) switching device is proposed in this paper. PMIC is controlled with PWM control method in order to have high power efficiency at high current level. DTMOS with low on-resistance is designed to decrease conduction loss. The control parts in Buck converter, that is, PWM control circuits consist of a saw-tooth generator, a band-gap reference circuit, an error amplifier and a comparator circuit as a block. The Saw-tooth generator is made to have 1.2 MHz oscillation frequency and full range of output swing from ground to supply voltage(VDD:3.3V). The comparator is designed with two stage OP amplifier. And the error amplifier has 70dB DC gain and $64^{\circ}$ phase margin. DC-DC converter, based on Voltage-mode PWM control circuits and low on-resistance switching device, achieved the high efficiency near 95% at 100mA output current. And DC-DC converter is designed with LDO in stand-by mode which fewer than 1mA for high efficiency.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.42 no.11
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• pp.9-16
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• 2005

This paper proposes a programmable PLL (phase locked loop) based clock generator supporting a wide-range-frequency input and output for high performance and low power SoC with multiple clock frequencies domains. The propose system reduces the locking time and obtains a wide range operation frequency by using a dual-charge pumps scheme. For low power operation of a chip, the locking processing circuits of the proposed PLL doesn't be working in the standby mode but the locking data are retained by the DAC. Also, a tracking ADC is designed for the fast relocking operation after stand-by mode exit. The programmable output frequency selection's circuit are designed for supporting a optimized DFS operation according to job tasks. The proposed PLL-based clock system has a relock time range of $0.85{\mu}sec{\sim}1.3{\mu}sec$($24\~26$cycle) with 2.3V power supply, which is fabricated on $0.35{\mu}m$ CMOS Process. At power-down mode, PLL power saves more than $95\%$ of locking mode. Also, the PLL using programmable divider has a wide locking range ($81MHz\~556MHz$) for various clock domains on a multiple IPs system.

• Transactions of the Korean Society of Mechanical Engineers B
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• v.34 no.9
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• pp.867-873
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• 2010

The failure of water-cooled generator stator windings as a result of insulation breakdown due to coolant water leaks and water absorption often occurs worldwide. Such failure can cause severe grid-related accidents as well as huge economic losses. More than 50% of domestic generators have been operated for over 15 years, and therefore, they exhibit signs of aging. Leaking and water-absorbing windings are often found during an overhaul. In an existing method for evaluating the integrity of generator stator windings, the drying process of the interior of the windings is ignored and only final leak tests are performed. In this study, it is shown that water leaks and water absorption in stator windings can be detected indirectly through vacuum pattern analysis in the vacuum drying mode, which is the used in the preparation stage of the leak test.

• Tribology and Lubricants
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• v.28 no.6
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• pp.265-271
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• 2012

In the preceding Part I study, for improving the unbalance response vibration of a large PRT motor-generator rotor fundamentally by design, a series of design analyses were carried out for bearing improvement by retrofitting from original plain partial journal bearings, applied for operation at a rated speed of 1,800 rpm, to final tilting pad journal bearings. To satisfy evenly key basic lubrication performances such as the minimum lift-off speed and maximum oil-film temperature, a design solution of 5-pad tilting pad journal bearings and maximizing the direct stiffness by about two times has been achieved. In this Part II study, a detailed rotordynamic analysis of the large PRT motor-generator rotor-bearing system will be performed, applying both the original plain partial journal bearings and the retrofitted tilting pad journal bearings, to confirm the effect of rotordynamic vibration improvement after retrofitting. The results show that the rotor unbalance response vibrations with the tilting pad journal bearings are greatly reduced by as much as about one ninth of those with the plain partial journal bearings. In addition, for the tilting pad journal bearings there exist no critical speed up to the rated speed and just one instance of a concerned critical speed around the rated speed, whereas for the plain partial journal bearings there exist one instance of a critical speed up to the rated speed and two instances of concerned critical speeds around the rated speed.

• Proceedings of the KIEE Conference
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• 1986.07a
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• pp.132-135
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• 1986

This paper shows that using the multivariable controller reduces the magnitude of fluctuations of the control signals which result improved control of the steam generator outputs. Comparison of the performance of the multivariable weighted adaptive controller(MWAC) with the performance of the existing PI controller and the self_tuning controller/1/, when the system goes through a transient mode, shows that the out-puts stay closer to their set points when they are controlled by the adaptive controller.

• Proceedings of the IEEK Conference
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• 2002.07a
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• pp.646-649
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• 2002

In this paper, a low-voltage CMOS squarer and a four-quadrant analog multiplier are presented. It is based on a source-coupled pair and a scaled-floating voltage generator which are modified to work as a voltage squaring and a sum/difference circuits. The proposed squarer/multiplier have been simulated with HSPICE, where -3㏈ bandwidth of 10MHz is achieved. The power consumption is about 0.6㎽, from a ${\pm}$1.5V supply, and the total harmonic distortion is less than 0.7%, with a 1.2V peak-to-peak 1MHz input signal.

• Proceedings of the Korean Information Science Society Conference
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• 2003.04c
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• pp.437-439
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• 2003

자연의 진화 과정을 모방한 유전자 알고리즘을 이미지 생성기 분야에 적응하여 무한히 다양한 이미지를 생성하는 것은 가능한 반면, 다음 세대에 생성될 이미지들의 예측은 난해하다. 이러한 배경 하에 본 논문에서는 대화식 프랙탈 이미지 생성기를 구현하여, Direct draw mode를 통해 프랙탈 이미지를 생성하기 위해 사용되는 아핀들을 사용자가 직접 변환함으로써 미세 조정이 가능하도록 한다.