• Title/Summary/Keyword: Gate electrodes

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Fabrication and Characteristics of CNT-FEAs with Under-gate Structure

  • Noh, Hyung-Wook;Jun, Pil-Goo;Ko, Sung-Woo;Kwak, Byung-Hwak;Park, Sang-Sik;Lee, Jong-Duk;Uh, Hyung-Soo
    • 한국정보디스플레이학회:학술대회논문집
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    • 2005.07b
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    • pp.1470-1473
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    • 2005
  • We proposed new triode-type Field Emitter Arays using Carbon NanoTubes(CNT-FEAs) as electron emission sources at low electric fields. The CNTs were selectively grown on the patterned catalyst layer by Plasma-Enhanced Chemical Vapor Deposition (PECVD). In this structure, gate electrodes are located underneath the cathode electrodes and extracted gate is surrounded by CNT emitters. Furthermore, in order to control density of CNTs, we investigated effect of using rapid thermal annealing (RTA).

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Properties of MFSEET′s with various gate electrodes using $LiNbO_3$ ferroelectric thin film ($LiNbO_3$강유전체 박막을 이용한 MFSFET's의 게이트 전극 변화에 따른 특성)

  • 정순원;김광호
    • Journal of the Korean Vacuum Society
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    • v.11 no.2
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    • pp.103-107
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    • 2002
  • Metal/ferroelectric/semiconductor field effect transistors(MFSFET′s) with various gate electrodes, that are aluminum, platinum and poly-Si, using rapid thermal annealed $LiNbO_3$/Si(100) structures were fabricated and the properties of the FET′s have been discussed. The drain current of the "on" state of FET with Pt electrode was more than 3 orders of magnitude larger than the "off" state current at the same "read" gate voltage of 1.5 V, which means the memory operation of the MFSFET. A write voltage as low as about $\pm$4 V, which is applicable to low power integrated circuits, was used for polarization reversal. The retention properties of the FET using Al electrode were quite good up to about $10^3$ s and using Pt electrode remained almost the same value of its initial value over 2 days at room temperature.

Graphene Field-effect Transistors on Flexible Substrates

  • So, Hye-Mi;Kwon, Jin-Hyeong;Chang, Won-Seok
    • Proceedings of the Korean Vacuum Society Conference
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    • 2012.02a
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    • pp.578-578
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    • 2012
  • Graphene, a flat one-atom-thick two-dimensional layer of carbon atoms, is considered to be a promising candidate for nanoelectronics due to its exceptional electronic properties. Most of all, future nanoelectronics such as flexible displays and artificial electronic skins require low cost manufacturing process on flexible substrate to be integrated with high resolutions on large area. The solution based printing process can be applicable on plastic substrate at low temperature and also adequate for fabrication of electronics on large-area. The combination of printed electronics and graphene has allowed for the development of a variety of flexible electronic devices. As the first step of the study, we prepared the gate electrodes by printing onto the gate dielectric layer on PET substrate. We showed the performance of graphene field-effect transistor with electrohydrodynamic (EHD) inkjet-printed Ag gate electrodes.

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A Printing Process Combining Screen Printing with Reverse Off-set for a Fine Patterning of Electrodes on Large Area Substrate (스크린 인쇄와 리버스 오프셋 인쇄를 혼합한 대면적 미세 전극용 인쇄공정)

  • Park, Ji-Eun;Song, Chung-Kun
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.24 no.5
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    • pp.374-380
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    • 2011
  • In this paper a printing process for patterning electrodes on large area substrate was developed by combining screen printing with reverse off-set printing. Ag ink was uniformly coated by screen printing. And then etching resist (ER) was patterned in the Ag film by reverse off-set printing, and then the non-desired Ag film was etched off by etchant. Finally, the ER was stripped-off to obtain the final Ag patterns. We extracted the suitable conditions of reverse Using the process we successfully fabricated gate electrodes and scan bus lines of OTFT-backplane used for e-paper, in which the diagonal size was 6 inch, the resolution $320{\times}240$, the minimum line width 30 um, and sheet resistance 1 ${\Omega}/{\Box}$.

Study on OTFT-Backplane for Electrophoretic Display Panel (전기영동 디스플레이 패널용 OTFT-하판 제작 연구)

  • Lee, Myung-Won;Ryu, Gi-Sung;Song, Chung-Kun
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.45 no.7
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    • pp.1-8
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    • 2008
  • We fabricated flexible electrophoretic display(EPD) driven by organic thin film transistors(OTFTs) on plastic substrate. We designed the W/L of OTFT to be 15, considering EPD's transient characteristics. The OTFTs employed bottom contact structure and used Al for gate electrode, the cross-linked polyvinylphenol for gate insulator, pentacene for active layer. The plastic substrate was coated by PVP barrier layer in order to remove the islands which were formed after pre-shrinkage process and caused the electrical short between bottom scan and top data metal lines. Pentacene active layer was confined within the gate electrodes so that the off current was controlled and reduced by gate electrodes. Especially, PVA/Acryl double layers were inserted between EPD panel and OTFT-backplane in order to protect OTFT-backplane from the damages created by lamination process of EPD panel on the backplane and also accommodate pixel electrodes through via holes. From the OTFT-backplane the mobility was $0.21cm^2/V.s$, Ion/Ioff current ratio $10^5$. The OTFT-EPD panel worked successfully and demonstrated to display some patterns.

An Improvement of the Gas Discharge Structure of the AMD Gate PDP (AND Gate PDP의 기체방전구조 개선)

  • Ryeom, Jeong-Duk
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.18 no.5
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    • pp.42-47
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    • 2004
  • This research has improved the problem of discharge AND gate PDP proposed before. The polarity of the DC discharge which composes AND gate is reversely designed and the cross talk problem to the adjacent scanning electrode has been improved. The AND gate proposed before operated by using non-linearity of the discharge by the space charge. In this research, new discharge NOT logic in which it was used that an applied voltage changed with the discharge circuit was added to AND gate. AND gate came to operate more stably. A selective address was able to be discharged with four horizontal scanning electrodes from the experiment result. The operation margin of the AND gate discharge obtained 34V and of the address discharge obtained 70V.

Influence of Source/Drain Electrodes on the Properties of Zinc Tin Oxide Transparent Thin Film Transistors (Zinc Tin Oxide 투명 박막트랜지스터의 특성에 미치는 소스/드레인 전극의 영향)

  • Ma, Tae Young;Cho, Mu Hee
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.28 no.7
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    • pp.433-438
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    • 2015
  • Zinc tin oxide transparent thin film transistors (ZTO TTFTs) were fabricated by using $n^+$ Si wafers as gate electrodes. Indium (In), aluminum (Al), indium tin oxide (ITO), silver (Ag), and gold (Au) were employed for source and drain electrodes, and the mobility and the threshold voltage of ZTO TTFTs were observed as a function of electrode. The ZTO TTFTs adopting In as electrodes showed the highest mobility and the lowest threshold voltage. It was shown that Ag and Au are not suitable for the electrodes of ZTO TTFTs. As the results of this study, it is considered that the interface properties of electrode/ZTO are more influential in the properties of ZTO TTFTs than the conductivity of electrode.

Breakdown characteristics of gate oxide with tungsten polycide electrode (텅스텐 폴리사이드 전극에 따른 게이트 산화막의 내압 특성)

  • 정회환;이종현;정관수
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.33A no.12
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    • pp.77-82
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    • 1996
  • The breakdown characteristics of metal-oxide-semiconductor(MOS) capacitors fabricated by Al, polysilicon, and tungsten polycide gate electrodes onto gate oxide was evaluated by time zero dielectric breakdwon (TZDB). The average breakdown field of the gate oxide with tungsten polycide electride was lower than that of the polysilicon electrode. The B model (1~8MV/cm) failure of the gate oxide with tungsten polycide electrode was increased with increasing annealing temperature in the dry $O_{2}$ ambient. This is attributed ot fluorine and tungsten diffusion from thungsten silicide film into the gate oxide, and stress increase of tungsten polcide after annealing treatment.

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Indium Gallium Zinc Oxide(IGZO) Thin-film transistor operation based on polarization effect of liquid crystals from a remote gate

  • Kim, Myeong-Eon;Lee, Sang-Uk;Heo, Yeong-U;Kim, Jeong-Ju;Lee, Jun-Hyeong
    • Proceedings of the Korean Institute of Surface Engineering Conference
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    • 2018.06a
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    • pp.142.1-142.1
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    • 2018
  • This research presents a new field effect transistor (FET) by using liquid crystal gate dielectric with remote gate. The fabrication of thin-film transistors (TFTs) was used Indium tin oxide (ITO) for the source, drain, and gate electrodes, and indium gallium zinc oxide (IGZO) for the active semiconductor layer. 5CB liquid crystal was used for the gate dielectric material, and the remote gate and active layer were covered with the liquid crystal. The output and transfer characteristics of the LC-gated TFTs were investigated.

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Thin Film Transistor fabricated with CIS semiconductor nanoparticle

  • Kim, Bong-Jin;Kim, Hyung-Jun;Jung, Sung-Mok;Yoon, Tae-Sik;Kim, Yong-Sang;Choi, Young-Min;Ryu, Beyong-Hwan;Lee, Hyun-Ho
    • 한국정보디스플레이학회:학술대회논문집
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    • 2009.10a
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    • pp.1494-1495
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    • 2009
  • Thin Film Transistor(TFT) having CIS (CuInSe) semiconductor layer was fabricated and characterized. Heavily doped Si was used as a common gate electrode and PECVD Silicon nitride ($SiN_x$) was used as a gate dielectric material for the TFT. Source and drain electrodes were deposited on the $SiN_x$ layer and CIS layer was formed by a direct patterning method between source and drain electrodes. Nanoparticle of CIS material was used as the ink of the direct patterning method.

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