• Title/Summary/Keyword: Gate Operation

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Estimation of Rock Erodibility due to Energy Dissipation of Inflow Passing through the Sluice Gate of Seadike (배수갑문 유입수류의 에너지 감쇠에 따른 암석 침식 가능성 추정)

  • Jo, Jin-Hun;Park, Yeong-Jin;Park, Sang-Hyeon
    • Journal of Korea Water Resources Association
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    • v.33 no.2
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    • pp.237-245
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    • 2000
  • Sihwa seadike is originally designed to control the water level In lake Sihwa. However the sluice gate is being operated everyday to preserve the water quality of lake. Due to the frequent operation of gates the bottom of drainage canal which is composed of weathered rock and soft rock is being scoured. Recently the bottom in the front area of apron was protected by putting underwater concrete. This study is carried out to understand the hydraulic situation for protection, and to estimate the trend of scouring by comparing between energy dissipation and registance of bottom rock. Annandale(1995) introduced the erodibility index theory, and suggested a criteria to judge the erodibility of rock through the relation between the erodibility index and energy dissipation. Determenation of erodibility index of rock is based on the results of sample core analysis, and the energy dissipation of flow is calculated from the estimation of total head on the scale model. These two values are plotted on the criteria, and the erodibility of rock is determined.

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An Analysis of Container Logistics System by Computer Simulation (시뮬레이션에 의한 컨테이너 물류시스템의 분석에 관하여(BCTOC를 중심으로))

  • 유승열;여기태;이철영
    • Journal of the Korean Institute of Navigation
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    • v.21 no.1
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    • pp.1-11
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    • 1997
  • Because of the sharp increase of its export and import container cargo volumes contrast to the lack of related Container Terminal facility, equipment and inefficient procedure, there is now heavy container cargo congestions in Pusan Container Terminal. As a result of such a situation, many container ships avoid their calls into Pusan port. This is a major cause that in tum kads to weakening intemational competitiveness of the Korean industry. This study, therefore, aims are to make a quantitative analysis of Container Terminal System through the computer simulation, especially focusing on its 4 sub-system of a handling system, 'it is checked whether the current operation is being performed effectively through the computer simulation. The overall findings are as folIows; Firstly, average tonnage of the ships visiting the BCTOC was 32,360 G/T in from January '96, to may '96. The average arrival interval and service time of container ships at BCTOC are 5.63 hours and 18.67 hours respectively. Ship's arrival and service pattern at BCTOC was exponential distribution with 95% confidence and Erlang-4 distribution with 99% confidence. Secondly, average waiting time and number of ships was 9.9 hours, 235 ships(38%) among 620 ships. Number of stevedoring container per ship was average 747.7 TED, standard deviation 379.1 TEU and normal distribution with 99% confidence. Thirdly, from the fact that the average storage days of containers at BCTOC are 2.75 days (3.0 days when import, 2.5 days when export). it is founds that most containers were transfered to the off-dock storage areas with the free periods(5 days when import, 4 days when export), the reason for which is considered to be the insufficient storage area at BCTOC. Fourthly, in the case of gate in-out at BCTOC, occupied containers and emptied containers are 89% and 11% respectively in the gate-in, 75% and 25% seperately in the gate-out. Finally, from the quantitative analysis results for container terminal at BCTOC, ship's average wating time of ships was found to be 20.77 hours and berth occupancy rate(${\rho}$) was 0.83. 5~6 berths were required in order that the berth occupancy rate(${\rho}$) may be maintained up to 60% degree.

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TID and SEGR Testing on MOSFET of DC/DC Power Buck Converter (DC/DC 강압컨버터용 MOSFET의 TID 및 SEGR 실험)

  • Lho, Young Hwan
    • Journal of the Korean Society for Aeronautical & Space Sciences
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    • v.42 no.11
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    • pp.981-987
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    • 2014
  • DC/DC switching power converters are commonly used to generate a regulated DC output voltage with high efficiency. The DC/DC converter is composed of a MOSFET (metal-oxide semiconductor field effect transistor), a PWM-IC (pulse width modulation-integrated circuit) controller, inductor, capacitor, etc. It is shown that the variation of threshold voltage and the breakdown voltage in the electrical characteristics of MOSFET occurs by radiation effects in TID (Total Ionizing Dose) testing at the low energy ${\gamma}$ rays using $^{60}Co$, and 5 heavy ions make the gate of MOSFET broken in SEGR (Single Event Gate Rupture) testing. TID testing on MOSFET is accomplished up to the total dose of 40 krad, and the cross section($cm^2$) versus LET(MeV/mg/$cm^2$) in the MOSFET operation is studied at SEGR testing after implementation of the controller board.

A Study on Slow Driving of Metropolitan Train for Disorder Condition of Platform Safety Gate using LTE-R and Beacon (LTE-R과 비콘을 활용한 승강장안전문 장애발생 시 열차 서행운전에 관한 연구)

  • Joh, Eungyoung;Noh, Jowon;Kim, Jin-Tea;Lee, Sunghwa
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.20 no.3
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    • pp.31-36
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    • 2020
  • The LTE-R system is a system consisting of a packet network that provides all IP-based services. Continuous failures related to the platform safety gate and subsequent safety accidents related to passengers and safety gate workers continue. The secondary damage caused by the failure of the platform safety door and the related human life damage have emerged as a major social issue.. By linking the beacon system to the Long Term Evoluton-Railway (LTE-R) network, an LTE-based railway wireless network currently in operation or being installed, it precisely locates trains and provides standardized fault alerts to train crews. When entering into the station, ultimately we will decelerate the train and reduce the accidents of metropolitabn railroad traffic by securing safe driving.

Graphene Transistor Modeling Using MOS Model (MOS 모델을 이용한 그래핀 트랜지스터 모델링)

  • Lim, Eun-Jae;Kim, Hyeongkeun;Yang, Woo Seok;Yoo, Chan-Sei
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.26 no.9
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    • pp.837-840
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    • 2015
  • Graphene is a single layer of carbon material which shows very high electron mobility, so many kinds of research on the devices using graphene layer have been performed so far. Graphene material is adequate for high frequency and fast operation devices due to its higher mobility. In this research, the actual graphene layer is evaluated using RT-CVD method which can be available for mass production. The mobility of $7,800cm^2/Vs$ was extracted, that is more than 7 times of that in silicon substrate. The graphene transistor model having no band gap is evaluated using both of pMOS and nMOS based on the measured mobility values. And then the response of graphene transistor model regarding to gate length and width is examined.

Thermal-structural Analysis and Fatigue Life Evaluation of a Parallel Slide Gate Valve in Accordance with ASME B&PVC (패러럴 슬라이드 게이트밸브의 열구조해석 및 ASME B&PVC 기반 피로수명 평가)

  • Kim, Tae Ho;Choi, Jae Seung;Han, Jeong Sam
    • Transactions of the Korean Society of Mechanical Engineers A
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    • v.41 no.2
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    • pp.157-164
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    • 2017
  • A parallel slide gate valve (PSGV) is located between the heat recovery steam generator (HRSG) and the steam turbine in a combined cycle power plant (CCPP). It is used to control the flow of steam and runs with repetitive operations such as startups, load changes, and shutdowns during its operation period. Therefore, it is necessary to evaluate the fatigue damage and the structural integrity under a large compressive thermal stress due to the temperature difference through the valve wall thickness during the startup operations. In this paper, the thermal-structural analysis and the fatigue life evaluation of a 16-inch PSGV, which is installed on the HP steam line, is performed according to the fatigue life assessment method described in the ASME B&PVC VIII-2; the method uses the equivalent stress from the elastic stress analysis.

Thin Film Transistor Characteristics with ZnO Channel Grown by RF Magnetron Sputtering (RF Magnetron Sputtering으로 증착된 ZnO의 증착 특성과 이를 이용한 Thin Film Transistor특성)

  • Kim, Young-Woong;Choi, Duck-Kyun
    • Journal of the Microelectronics and Packaging Society
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    • v.14 no.3
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    • pp.15-20
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    • 2007
  • Low temperature processed ZnO-TFTs on glass below $270^{\circ}C$ for plastic substrate applications were fabricated and their electrical properties were investigated. Films in ZnO-TFTs with bottom gate configuration were made by RF magnetron sputtering system except for $SiO_2$ gate oxide deposited by ICP-CVD. ZnO channel films were grown on glass with various Ar and $O_2$ flow ratios. All of the fabricated ZnO-TFTs showed perfectly the enhancement mode operation, a high optical transmittance of above 80% in visible ranges of the spectrum. In the ZnO-TFTs with pure Ar process, the field effect mobility, threshold voltage, and on/off ratio were measured to be $1.2\;cm^2/Vs$, 8.5 V, and $5{\times}10^5$, respectively. These characteristic values are much higher than those of the ZnO-TFTs of which ZnO channel layers were processed with additional $O_2$ gas. In addition, ZnO-TFT with pure Af process showed smaller swing voltage of 1.86v/decade compared to those with $Ar+O_2$ process.

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Syntheses and realization of Quaternary Galois Field Sum-Of-Product(QGFSOP) expressed 1-variable functions Permutational Literals (치환리터럴에 의한 Quaternary Galois Field Sum-Of-Product(QGFSOP)형 1-변수 함수의 합성과 실현)

  • Park, Dong-Young;Kim, Baek-Ki;Seong, Hyeun-Kyeong
    • Journal of Advanced Navigation Technology
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    • v.14 no.5
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    • pp.710-717
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    • 2010
  • Even though there are 256 possible 1-qudit(1-variable quantum digit) functions in quaternary logic, the most useful functions are 4!=24 ones capable of representing in QGFSOP expressions by possible permuting of 0,1,2, and 3. In this paper, we propose a permutational literal(PL) representation and a QPL(Quaternary PL) gate which use the operands of a multiplicand A and an augend D in $Ax^C$+D(GF4) operation as a control variable of multi-cascaded PLs. And we also present new PL synthesis algorithms to synthesize QGFSOP expressed 24 (1-qudit) functions by applying three PL operators as ab(mutual permutation), + D(addition), and XA (multiplication). Finally architectures, circuits, and a CMOS implementation to realize proposed PL synthesis algorithms for $Ax^C$+D(GF4) functions are presented.

Analysis of Relation between Conduction Path and Threshold Voltages of Double Gate MOSFET (이중게이트 MOSFET의 전도중심과 문턱전압의 관계 분석)

  • Jung, Hakkee;Han, Jihyung;Lee, Jongin
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2012.10a
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    • pp.818-821
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    • 2012
  • This paper have analyzed the change of threshold voltage for conduction path of double gate(DG) MOSFET. The threshold voltage roll-off among the short channel effects of DGMOSFET have become obstacles of precise device operation. The analytical solution of Poisson's equation have been used to analyze the threshold voltage, and Gaussian function been used as carrier distribution to analyze closely for experimental results. The threshold voltages for conduction path have been analyzed for device parameters such as channel length, channel thickness, gate oxide thickness and doping concentration. Since this potential model has been verified in the previous papers, we have used this model to analyze the threshold voltage. Resultly, we know the threshold voltage is greatly influenced on the change of conduction path for device parameters of DGMOSFET.

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Analysis of Relation between Conduction Path and Breakdown Voltages of Double Gate MOSFET (DGMOSFET의 전도중심과 항복전압의 관계 분석)

  • Jung, Hakkee;Han, Jihyung;Kwon, Ohshin
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2012.10a
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    • pp.825-828
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    • 2012
  • This paper have analyzed the change of breakdown voltage for conduction path of double gate(DG) MOSFET. The low breakdown voltage among the short channel effects of DGMOSFET have become obstacles of device operation. The analytical solution of Poisson's equation have been used to analyze the breakdown voltage, and Gaussian function been used as carrier distribution to analyze closely for experimental results. The change of breakdown voltages for conduction path have been analyzed for device parameters such as channel length, channel thickness, gate oxide thickness and doping concentration. Since this potential model has been verified in the previous papers, we have used this model to analyze the breakdown voltage. Resultly, we know the breakdown voltage is greatly influenced on the change of conduction path for device parameters of DGMOSFET.

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