• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.24 no.5
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• pp.359-363
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• 2011

To integrate the sensor driver and logic circuits, fabricating down scaled transistors has been main issue. At this research, short channel effects were analyzed after n channel polycrystalline silicon thin film transistor was fabricated at high temperature. As a result, on current, on/off current ratio and transconductance were increased but threshold voltage, electron mobility and s-slope were reduced with a decrease of channel length. When carriers that develop at grain boundary in activated polycrystalline silicon have no gate biased, on current was increased with punch through by drain current. Also, due to BJT effect (parallel bipolar effect) that developed under region of channel by increase of gate voltage on current was rapidly increased.

• Journal of the Korean Institute of Telematics and Electronics
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• v.26 no.11
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• pp.1706-1711
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• 1989

Unit processes for the fabrication of HEMT(high electron mobility transistor)was studied and the optimum conditions of them were applied to the fabrifcation of a discrete HEMT device. The HEMT with a nominal gate-source spacing of 3.6\ulcorner and a gate length of 2.8\ulcorner showed a transconductance of 46.1mS/mm and a threshold voltage of -0.29V. A source-drain voltage of 2.0V for a saturation current of 35mA/mm was achieved.

• Journal of the Korean Institute of Telematics and Electronics
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• v.26 no.11
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• pp.1644-1651
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• 1989

In this paper, a two-dimensional numerical analysis of HEMT's with gate length of 0.6um is performed. In this case, Control Volume Formulation method which has been used in the analysis of heat transfer and fluid flow is used as a numerical method. As a mobility model, empirical formula including the velocithy overshoot phenomena is used instead of two-piece mobility model. The results obtained from this numerical analysis(i.e., the region in which cahnnel is formed, the strength of electric field in the channel, the distribution of potential, and the distribution of electron concentration etc.)are in good agreement with the previous analytic results. And our results also show the parasitic MESFET's operation in the range of the high gate voltage.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.18 no.10
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• pp.1527-1536
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• 1993

A new transmitter circuit for remote controllers is designed to provide flexibility and expandibility in function. The circuit employs a microcode approach to accept various code format, length and pulse widths through programming, and the precessing logics is eliminated to reduce its size. The circuit was Implemented using FPGA(Field Programmable Gate Array) and it was found to operate successfully).

• Proceedings of the KIEE Conference
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• 2001.07c
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• pp.1515-1517
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• 2001

In this work the electrical characteristics of organic TFTs with the semiconductor-insulator interfaces have been interested. Pentacene is used as an active semiconducting layer. The semiconductor layer of pentacene was thermally evaporated in vacuum at a pressure of about $2{\times}10^{-6}$ Torr and at a deposition rate of 0.3$\AA$/sec. Aluminium and gold were used for gate and source/drain electrodes. before pentacene is deposited on the insulator, the gate dielectric surfaces of two samples were rubbed with lateral and perpendicular to direction of the channel length respectively.

• The KSFM Journal of Fluid Machinery
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• v.14 no.5
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• pp.39-47
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• 2011

Flow control range of valve, which is installed on pipeline, varies according to valve type, pipe diameter, pipe length, roughness, and elevation difference of both ends of pipeline. A lot of computation efforts and knowledge are needed to estimate flow control range of valve, considering above many parameters. The table of flow control range of each valve type is presented for convenience of pipeline design engineers who must make decision of valve size and type in this study. Also the reason that butterfly valve is recommended for flow control, and gate valve is forbidden is presented via quantification and figures in this study.

• Proceedings of the IEEK Conference
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• 2002.06b
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• pp.33-36
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• 2002

MESFET was fabricated using 4H-SiC substrates and epitaxy The DC characteristics of 0.5 urn gate length, 400 urn gate width MESFET had $I_{dss}$=200 ㎃/mm, maximum transconductance of 12 ㎳/mm at Vrs=-4 V, V, Is=27 V. Thc device had an fT of 2.5 GHz and $f_{mdx}$ of 13.3 GHz at $V_{ds}$ =27 V and $V_{g}$=-4 V. The fabrication and characterization of this device are discussed.d.d.d.

• Proceedings of the IEEK Conference
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• 2002.06b
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• pp.217-220
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• 2002

In this paper, we have investigated electronical chara-cteristics of power LDMOSFETS having different ex-tended gate lengths(1.B${\mu}{\textrm}{m}$, 2.4${\mu}{\textrm}{m}$, 3.O${\mu}{\textrm}{m}$) in the temperature range of 300k-500K. The results of this study indicate that on-resistance, breakdown voltage increase with temperature. and drain current, threshold voltage, transconductance decrease with temperature. Particular the facts, we observed that Le is the more increase, on-resistance is the more decrease. because every conditions are fixed normal states, only change the Le. As a result, Ron/BV, known for a figure of merit of power device, increase with temperature.

• Journal of the Korean Institute of Telematics and Electronics
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• v.25 no.7
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• pp.780-790
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• 1988

We have studied the hot-carrier-induced degradation caused by the high channel electric field due to the decrease of the gate length of MOSFET used in VLSI. Under DC stress, the condition in which maximum substrate current occures gave the worst degradation. Under AC dynamic stress, other conditions, the pulse shape and the falling rate, gave enormous effects on the degradation phenomena, especially at 77K. Threshold voltage, transconductance, channel conductance and gate current were measured and compared under various stress conditions. The threshold voltage was almost completely recovered by hot-injection stress as a reverse-stress. But, the transconductance was rapidly degraded under hot-hole injection and recovered by sequential hot-electron stress. The Si-SiO2 interface state density was analyzed by a charge pumping technique and the charge pumping current showed the same trend as the threshold voltage shift in degradation process.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.32A no.12
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• pp.136-141
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• 1995

GaAs power MESFETs with 1 .mu.m gate length and an undoped GaAs surface layer on the doped GaAs channel are fabricated using IR(image reversal) and air-birdge processes. And then We have measured and calculated DC and RF characteristics. We have obtained saturation current 107-500 mA (197-255 mA/mm), maximum linear RF output power 111-518.8 mW (204-270 mW/mm), current gain cut-off frequency 7-10 GHz, maximum unilateral transducer power gain 5.7-12.7, and power added efficiencies 37.9-41.2 % from the devices with gate width 0.45-2.2 mm, at 6 GHz.