• Title/Summary/Keyword: Gate Bias Control

Search Result 52, Processing Time 0.027 seconds

DEVELOPMENT OF THE READOUT CONTROLLER FOR INFRARED ARRAY (적외선검출기 READOUT CONTROLLER 개발)

  • Cho, Seoung-Hyun;Jin, Ho;Nam, Uk-Won;Cha, Sang-Mok;Lee, Sung-Ho;Yuk, In-Soo;Park, Young-Sik;Pak, Soo-Jong;Han, Won-Yong;Kim, Sung-Soo
    • Publications of The Korean Astronomical Society
    • /
    • v.21 no.2
    • /
    • pp.67-74
    • /
    • 2006
  • We have developed a control electronics system for an infrared detector array of KASINICS (KASI Near Infrared Camera System), which is a new ground-based instrument of the Korea Astronomy and Space science Institute (KASI). Equipped with a $512{\times}512$ InSb array (ALADDIN III Quadrant, manufactured by Raytheon) sensitive from 1 to $5{\mu}m$, KASINICS will be used at J, H, Ks, and L-bands. The controller consists of DSP(Digital Signal Processor), Bias, Clock, and Video boards which are installed on a single VME-bus backplane. TMS320C6713DSP, FPGA(Field Programmable Gate Array), and 384-MB SDRAM(Synchronous Dynamic Random Access Memory) are included in the DSP board. DSP board manages entire electronics system, generates digital clock patterns and communicates with a PC using USB 2.0 interface. The clock patterns are downloaded from a PC and stored on the FPGA. UART is used for the communication with peripherals. Video board has 4 channel ADC which converts video signal into 16-bit digital numbers. Two video boards are installed on the controller for ALADDIN array. The Bias board provides 16 dc bias voltages and the Clock board has 15 clock channels. We have also coded a DSP firmware and a test version of control software in C-language. The controller is flexible enough to operate a wide range of IR array and CCD. Operational tests of the controller have been successfully finished using a test ROIC (Read-Out Integrated Circuit).

Multi-channel Transimpedance Amplifier Arrays in Short-Range LADAR Systems for Unmanned Vehicles (무인차량용 단거리 라이다 시스템을 위한 멀티채널 트랜스임피던스 증폭기 어레이)

  • Jang, Young Min;Kim, Seung Hoon;Cho, Sang Bock;Park, Sung Min
    • Journal of the Institute of Electronics and Information Engineers
    • /
    • v.50 no.12
    • /
    • pp.40-48
    • /
    • 2013
  • This paper presents multi-channel transimpedance amplifier(TIA) arrays in short-range LADAR systems for unmanned vehicles, by using a 0.18um CMOS technology. Two $4{\times}4$ channel TIA arrays including a voltage-mode INV-TIA and a current-mode CG-TIA are introduced. First, the INV-TIA consists of a inverter stage with a feedback resistor and a CML output buffer with virtual ground so as to achieve low noise, low power, easy current control for gain and impedance. Second, the CG-TIA utilizes a bias from on-chip bandgap reference and exploits a source-follower for high-frequency peaking, yielding 1.26 times smaller chip area per channel than INV-TIA. Post-layout simulations demonstrate that the INV-TIA achieves 57.5-dB${\Omega}$ transimpedance gain, 340-MHz bandwidth, 3.7-pA/sqrt(Hz) average noise current spectral density, and 2.84mW power dissipation, whereas the CG-TIA obtains 54.5-dB${\Omega}$ transimpedance gain, 360-MHz bandwidth, 9.17-pA/sqrt(Hz) average noise current spectral density, and 4.24mW power dissipation. Yet, the pulse simulations reveal that the CG-TIA array shows better output pulses in the range of 200-500-Mb/s operations.

A Light-induced Threshold Voltage Instability Based on a Negative-U Center in a-IGZO TFTs with Different Oxygen Flow Rates

  • Kim, Jin-Seob;Kim, Yu-Mi;Jeong, Kwang-Seok;Yun, Ho-Jin;Yang, Seung-Dong;Kim, Seong-Hyeon;An, Jin-Un;Ko, Young-Uk;Lee, Ga-Won
    • Transactions on Electrical and Electronic Materials
    • /
    • v.15 no.6
    • /
    • pp.315-319
    • /
    • 2014
  • In this paper, we investigate visible light stress instability in radio frequency (RF) sputtered a-IGZO thin film transistors (TFTs). The oxygen flow rate differs during deposition to control the concentration of oxygen vacancies, which is confirmed via RT PL. A negative shift is observed in the threshold voltage ($V_{TH}$) under illumination with/without the gate bias, and the amount of shift in $V_{TH}$ is proportional to the concentration of oxygen vacancies. This can be explained to be consistent with the ionization oxygen vacancy model where the instability in $V_{TH}$ under illumination is caused by the increase in the channel conductivity by electrons that are photo-generated from oxygen vacancies, and it is maintained after the illumination is removed due to the negative-U center properties.

Design of Variable Gain Low Noise Amplifier Using PTAT Bandgap Reference Circuit (PTAT 밴드갭 온도보상회로를 적용한 가변 이득 저잡음 증폭기 설계)

  • Choi, Hyuk-Jae;Go, Jae-Hyeong;Kim, Koon-Tae;Lee, Je-Kwang;Kim, Hyeong-Seok
    • Journal of The Institute of Information and Telecommunication Facilities Engineering
    • /
    • v.9 no.4
    • /
    • pp.141-146
    • /
    • 2010
  • In this paper, bandgap reference PTAT(Proportional to Absolute Temperature) circuit and flexible gain control of LNA(Low Noise Amplifier) which is usable in Zigbee system of 2.4GHz band are designed by TSMC $0.18{\mu}m$ CMOS library. PTAT bandgap reference circuit is proposed to minimize the instability of CMOS circuit which may be unstable in temperature changes. This circuit is designed such that output voltage remains within 1.3V even when the temperature varies from $-40^{\circ}C$ to $-50^{\circ}C$ when applied to the gate bias voltage of LNA. In addition, the LNA is designed to be operated on 2.4GHz which is applicable to Zigbee system and able to select gains by changing output impedance using 4 NMOS operated switches. The simulation result shows that achieved gain is 14.3~17.6dB and NF (Noise Figure) 1.008~1.032dB.

  • PDF

A dual-path high linear amplifier for carrier aggregation

  • Kang, Dong-Woo;Choi, Jang-Hong
    • ETRI Journal
    • /
    • v.42 no.5
    • /
    • pp.773-780
    • /
    • 2020
  • A 40 nm complementary metal oxide semiconductor carrier-aggregated drive amplifier with high linearity is presented for sub-GHz Internet of Things applications. The proposed drive amplifier consists of two high linear amplifiers, which are composed of five differential cascode cells. Carrier aggregation can be achieved by switching on both the driver amplifiers simultaneously and combining the two independent signals in the current mode. The common gate bias of the cascode cells is selected to maximize the output 1 dB compression point (P1dB) to support high-linear wideband applications, and is used for the local supply voltage of digital circuitry for gain control. The proposed circuit achieved an output P1dB of 10.7 dBm with over 22.8 dBm of output 3rd-order intercept point up to 0.9 GHz and demonstrated a 55 dBc adjacent channel leakage ratio (ACLR) for the 802.11af with -5 dBm channel power. To the best of our knowledge, this is the first demonstration of the wideband carrier-aggregated drive amplifier that achieves the highest ACLR performance.

Totem-pole Bridgeless Boost PFC Converter Based on GaN FETs (GaN FET을 이용한 토템폴 구조의 브리지리스 부스트 PFC 컨버터)

  • Jang, Paul;Kang, Sang-Woo;Cho, Bo-Hyung;Kim, Jin-Han;Seo, Han-Sol;Park, Hyun-Soo
    • The Transactions of the Korean Institute of Power Electronics
    • /
    • v.20 no.3
    • /
    • pp.214-222
    • /
    • 2015
  • The superiority of gallium nitride FET (GaN FET) over silicon MOSFET is examined in this paper. One of the outstanding features of GaN FET is low reverse-recovery charge, which enables continuous conduction mode operation of totem-pole bridgeless boost power factor correction (PFC) circuit. Among many bridgeless topologies, totem-pole bridgeless shows high efficiency and low conducted electromagnetic interference performance, with low cost and simple control scheme. The operation principle, control scheme, and circuit implementation of the proposed topology are provided. The converter is driven in two-module interleaved topology to operate at a power level of 5.5 kW, whereas phase-shedding control is adopted for light load efficiency improvement. Negative bias circuit is used in gate drivers to avoid the shoot-through induced by high speed switching. The superiority of GaN FET is verified by constructing a 5.5 kW prototype of two-module interleaved totem-pole bridgeless boost PFC converter. The experiment results show the highest efficiency of 98.7% at 1.6 kW load and an efficiency of 97.7% at the rated load.

A Ka-band 10 W Power Amplifier Module utilizing Pulse Timing Control (펄스 타이밍 제어를 활용한 Ka-대역 10 W 전력증폭기 모듈)

  • Jang, Seok-Hyun;Kim, Kyeong-Hak;Kwon, Tae-Min;Kim, Dong-Wook
    • Journal of the Institute of Electronics Engineers of Korea TC
    • /
    • v.46 no.12
    • /
    • pp.14-21
    • /
    • 2009
  • In this paper, a Ka-band 10 W power amplifier module with seven power MMIC bare dies is designed and fabricated using MIC technology which combines multiple MMIC chips on a thin film substrate. Modified Wilkinson power dividers/combiners and CBFGCPW-Microstrip transitions for suppressing resonance and reducing connection loss are utilized for high-gain and high-power millimeter wave modules. A new TTL pulse timing control scheme is proposed to improve output power degradation due to large bypass capacitors in the gate bias circuit. Pulse-mode operation time is extended more than 200 nsec and output power increase of 0.62 W is achieved by applying the proposed scheme to the Ka-band 10 W power amplifier module operating in the pulsed condition of 10 kHz and $5\;{\mu}sec$. The implemented power amplifier module shows a power gain of 59.5 dB and an output power of 11.89 W.

Active-Matrix Field Emission Display with Amorphous Silicon Thin-Film Transistors and Mo-Tip Field Emitter Arrays

  • Song, Yoon-Ho;Hwang, Chi-Sun;Cho, Young-Rae;Kim, Bong-Chul;Ahn, Seong-Deok;Chung, Choong-Heui;Kim, Do-Hyung;Uhm, Hyun-Seok;Lee, Jin-Ho;Cho, Kyoung-Ik
    • ETRI Journal
    • /
    • v.24 no.4
    • /
    • pp.290-298
    • /
    • 2002
  • We present, for the first time, a prototype active-matrix field emission display (AMFED) in which an amorphous silicon thin-film transistor (a-Si TFT) and a molybdenum-tip field emitter array (Mo-tip FEA) were monolithically integrated on a glass substrate for a novel active-matrix cathode (AMC) plate. The fabricated AMFED showed good display images with a low-voltage scan and data signals irrespective of a high voltage for field emissions. We introduced a light shield layer of metal into our AMC to reduce the photo leakage and back channel currents of the a-Si TFT. We designed the light shield to act as a focusing grid to focus emitted electron beams from the AMC onto the corresponding anode pixel. The thin film depositions in the a-Si TFTs were performed at a high temperature of above 360°C to guarantee the vacuum packaging of the AMC and anode plates. We also developed a novel wet etching process for $n^+-doped$ a-Si etching with high etch selectivity to intrinsic a-Si and used it in the fabrication of an inverted stagger TFT with a very thin active layer. The developed a-Si TFTs performed well enough to be used as control devices for AMCs. The gate bias of the a-Si TFTs well controlled the field emission currents of the AMC plates. The AMFED with these AMC plates showed low-voltage matrix addressing, good stability and reliability of field emission, and good light emissions from the anode plate with phosphors.

  • PDF

Application of Graphene in Photonic Integrated Circuits

  • Kim, Jin-Tae;Choe, Seong-Yul;Choe, Chun-Gi
    • Proceedings of the Korean Vacuum Society Conference
    • /
    • 2012.02a
    • /
    • pp.196-196
    • /
    • 2012
  • Graphene, two-dimensional one-atom-thick planar sheet of carbon atoms densely packed in a honeycomb crystal lattice, has grabbled appreciable attention due to its extraordinary mechanical, thermal, electrical, and optical properties. Based on the graphene's high carrier mobility, high frequency graphene field effect transistors have been developed. Graphene is useful for photonic components as well as for the applications in electronic devices. Graphene's unique optical properties allowed us to develop ultra wide-bandwidth optical modulator, photo-detector, and broadband polarizer. Graphene can support SPP-like surface wave because it is considered as a two-dimensional metal-like systems. The SPPs are associated with the coupling between collective oscillation of free electrons in the metal and electromagnetic waves. The charged free carriers in the graphene contribute to support the surface waves at the graphene-dielectric interface by coupling to the electromagnetic wave. In addition, graphene can control the surface waves because its charge carrier density is tunable by means of a chemical doping method, varying the Fermi level by applying gate bias voltage, and/or applying magnetic field. As an extended application of graphene in photonics, we investigated the characteristics of the graphene-based plasmonic waveguide for optical signal transmission. The graphene strips embedded in a dielectric are served as a high-frequency optical signal guiding medium. The TM polarization wave is transmitted 6 mm-long graphene waveguide with the averaged extinction ratio of 19 dB at the telecom wavelength of $1.31{\mu}m$. 2.5 Gbps data transmission was successfully accomplished with the graphene waveguide. Based on these experimental results, we concluded that the graphene-based plasmonic waveguide can be exploited further for development of next-generation integrated photonic circuits on a chip.

  • PDF

Design Optimization of a One-Stage Low Noise Amplifier below 20 GHz in 65 nm CMOS Technology (65 nm CMOS 기술을 적용한 20 GHz 이하의 1 단 저잡음 증폭기 설계)

  • Shen, Ye-Hao;Lee, Jae-Hong;Shin, Hyung-Cheol
    • Journal of the Institute of Electronics Engineers of Korea SD
    • /
    • v.46 no.6
    • /
    • pp.48-51
    • /
    • 2009
  • One-stage low noise amplifier (LNA) using 65 nm RF CMOS technology below 20 GHz is designed to find the optimal bias voltage and optimal width of input transistor so that the maximum figure of merit (FoM) has been achieved. If the frequency is higher than 13 GHz, the amplifier needs two-stage to achieve the higher gain. If the frequency is lower than 5 GHz, one additional capacitor between gate and source should be added to control the power under the limitation. This paper summarizes one-stage LNA overall performances below 20 GHz and this approach can also be applied to other CMOS technology of LNA designs.