• Title/Summary/Keyword: Gallium Oxide

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Flexibility Improvement of InGaZnO Thin Film Transistors Using Organic/inorganic Hybrid Gate Dielectrics

  • Hwang, B.U.;Kim, D.I.;Jeon, H.S.;Lee, H.J.;Lee, N.E.
    • Proceedings of the Korean Vacuum Society Conference
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    • 2012.02a
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    • pp.341-341
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    • 2012
  • Recently, oxide semi-conductor materials have been investigated as promising candidates replacing a-Si:H and poly-Si semiconductor because they have some advantages of a room-temperature process, low-cost, high performance and various applications in flexible and transparent electronics. Particularly, amorphous indium-gallium-zinc-oxide (a-IGZO) is an interesting semiconductor material for use in flexible thin film transistor (TFT) fabrication due to the high carrier mobility and low deposition temperatures. In this work, we demonstrated improvement of flexibility in IGZO TFTs, which were fabricated on polyimide (PI) substrate. At first, a thin poly-4vinyl phenol (PVP) layer was spin coated on PI substrate for making a smooth surface up to 0.3 nm, which was required to form high quality active layer. Then, Ni gate electrode of 100 nm was deposited on the bare PVP layer by e-beam evaporator using a shadow mask. The PVP and $Al_2O_3$ layers with different thicknesses were used for organic/inorganic multi gate dielectric, which were formed by spin coater and atomic layer deposition (ALD), respectively, at $200^{\circ}C$. 70 nm IGZO semiconductor layer and 70 nm Al source/drain electrodes were respectively deposited by RF magnetron sputter and thermal evaporator using shadow masks. Then, IGZO layer was annealed on a hotplate at $200^{\circ}C$ for 1 hour. Standard electrical characteristics of transistors were measured by a semiconductor parameter analyzer at room temperature in the dark and performance of devices then was also evaluated under static and dynamic mechanical deformation. The IGZO TFTs incorporating hybrid gate dielectrics showed a high flexibility compared to the device with single structural gate dielectrics. The effects of mechanical deformation on the TFT characteristics will be discussed in detail.

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Simple Route to High-performance and Solution-processed ZnO Thin Film Transistors Using Alkali Metal Doping

  • Kim, Yeon-Sang;Park, Si-Yun;Kim, Gyeong-Jun;Im, Geon-Hui
    • Proceedings of the Korean Vacuum Society Conference
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    • 2012.02a
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    • pp.187-187
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    • 2012
  • Solution-processed metal-alloy oxides such as indium zinc oxide (IZO), indium gallium zinc oxide (IGZO) has been extensively researched due to their high electron mobility, environmental stability, optical transparency, and solution-processibility. In spite of their excellent material properties, however, there remains a challenging problem for utilizing IZO or IGZO in electronic devices: the supply shortage of indium (In). The cost of indium is high, what is more, indium is becoming more expensive and scarce and thus strategically important. Therefore, developing an alternative route to improve carrier mobility of solution-processable ZnO is critical and essential. Here, we introduce a simple route to achieve high-performance and low-temperature solution-processed ZnO thin film transistors (TFTs) by employing alkali-metal doping such as Li, Na, K or Rb. Li-doped ZnO TFTs exhibited excellent device performance with a field-effect mobility of $7.3cm^2{\cdot}V-1{\cdot}s-1$ and an on/off current ratio of more than 107. Also, in case of higher drain voltage operation (VD=60V), the field effect mobility increased up to $11.45cm^2{\cdot}V-1{\cdot}s-1$. These all alkali metal doped ZnO TFTs were fabricated at maximum process temperature as low as $300^{\circ}C$. Moreover, low-voltage operating ZnO TFTs was fabricated with the ion gel gate dielectrics. The ultra high capacitance of the ion gel gate dielectrics allowed high on-current operation at low voltage. These devices also showed excellent operational stability.

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A Compact 370 W High Efficiency GaN HEMT Power Amplifier with Internal Harmonic Manipulation Circuits (내부 고조파 조정 회로로 구성되는 고효율 370 W GaN HEMT 소형 전력 증폭기)

  • Choi, Myung-Seok;Yoon, Tae-San;Kang, Bu-Gi;Cho, Samuel
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.24 no.11
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    • pp.1064-1073
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    • 2013
  • In this paper, a compact 370 W high efficiency GaN(Gallium Nitride) HEMT(High Electron Mobility Transistor) power amplifier(PA) using internal harmonic manipulation circuits is presented for cellular and L-band. We employed a new circuit topology for simultaneous high efficiency matching at both fundamental and 2nd harmonic frequency. In order to minimize package size, new 41.8 mm GaN HEMT and two MOS(Metal Oxide Semiconductor) capacitors are internally matched and combined package size $10.16{\times}10.16{\times}1.5Tmm^3$ through package material changes and wire bonded in a new package to improve thermal resistance. When drain biased at 48 V, the developed GaN HEMT power amplifier has achieved over 80 % Drain Efficiency(DE) from 770~870 MHz and 75 % DE at 1,805~1,880 MHz with 370 W peak output power(Psat.). This is the state-of-the-art efficiency and output power of GaN HEMT power amplifier at cellular and L-band to the best of our knowledge.

Synthesis of nano-sized Ga2O3 powders by polymerized complex method (착체중합법을 이용한 Ga2O3 나노 분말의 합성)

  • Jung, Jong-Yeol;Kim, Sang-Hun;Kang, Eun-Tae;Han, Kyu-Sung;Kim, Jin-Ho;Hwang, Kwang-Teak;Cho, Woo-Seok
    • Journal of the Korean Crystal Growth and Crystal Technology
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    • v.23 no.6
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    • pp.302-308
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    • 2013
  • In this study, we report the synthesis and characteristics of gallium oxide ($Ga_2O_3$) nanoparticles prepared by the polymerized complex method. $Ga_2O_3$ nanoparticles were synthesized using $Ga(NO_3)_3$, ethylene glycol, and citric acid as the starting materials at a low temperature of $500{\sim}800^{\circ}C$. The temperature of the weight reduction by the loss of organic precursor was revealed using TG-DTA analysis. The crystal structural change of $Ga_2O_3$ nanoparticles by the annealing process was investigated by XRD analysis. The morphologies and the size distributions of $Ga_2O_3$ nanoparticles were analyzed using SEM.

Hybrid MBE Growth of Crack-Free GaN Layers on Si (110) Substrates

  • Park, Cheol-Hyeon;O, Jae-Eung;No, Yeong-Gyun;Lee, Sang-Tae;Kim, Mun-Deok
    • Proceedings of the Korean Vacuum Society Conference
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    • 2013.02a
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    • pp.183-184
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    • 2013
  • Two main MBE growth techniques have been used: plasma-assisted MBE (PA-MBE), which utilizes a rf plasma to supply active nitrogen, and ammonia MBE, in which nitrogen is supplied by pyrolysis of NH3 on the sample surface during growth. PA-MBE is typically performed under metal-rich growth conditions, which results in the formation of gallium droplets on the sample surface and a narrow range of conditions for optimal growth. In contrast, high-quality GaN films can be grown by ammonia MBE under an excess nitrogen flux, which in principle should result in improved device uniformity due to the elimination of droplets and wider range of stable growth conditions. A drawback of ammonia MBE, on the other hand, is a serious memory effect of NH3 condensed on the cryo-panels and the vicinity of heaters, which ruins the control of critical growth stages, i.e. the native oxide desorption and the surface reconstruction, and the accurate control of V/III ratio, especially in the initial stage of seed layer growth. In this paper, we demonstrate that the reliable and reproducible growth of GaN on Si (110) substrates is successfully achieved by combining two MBE growth technologies using rf plasma and ammonia and setting a proper growth protocol. Samples were grown in a MBE system equipped with both a nitrogen rf plasma source (SVT) and an ammonia source. The ammonia gas purity was >99.9999% and further purified by using a getter filter. The custom-made injector designed to focus the ammonia flux onto the substrate was used for the gas delivery, while aluminum and gallium were provided via conventional effusion cells. The growth sequence to minimize the residual ammonia and subsequent memory effects is the following: (1) Native oxides are desorbed at $750^{\circ}C$ (Fig. (a) for [$1^-10$] and [001] azimuth) (2) 40 nm thick AlN is first grown using nitrogen rf plasma source at $900^{\circ}C$ nder the optimized condition to maintain the layer by layer growth of AlN buffer layer and slightly Al-rich condition. (Fig. (b)) (3) After switching to ammonia source, GaN growth is initiated with different V/III ratio and temperature conditions. A streaky RHEED pattern with an appearance of a weak ($2{\times}2$) reconstruction characteristic of Ga-polarity is observed all along the growth of subsequent GaN layer under optimized conditions. (Fig. (c)) The structural properties as well as dislocation densities as a function of growth conditions have been investigated using symmetrical and asymmetrical x-ray rocking curves. The electrical characteristics as a function of buffer and GaN layer growth conditions as well as the growth sequence will be also discussed. Figure: (a) RHEED pattern after oxide desorption (b) after 40 nm thick AlN growth using nitrogen rf plasma source and (c) after 600 nm thick GaN growth using ammonia source for (upper) [110] and (lower) [001] azimuth.

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Improved breakdown characteristics of Ga2O3 Schottky barrier diode using floating metal guard ring structure (플로팅 금속 가드링 구조를 이용한 Ga2O3 쇼트키 장벽 다이오드의 항복 특성 개선 연구)

  • Choi, June-Heang;Cha, Ho-Young
    • Journal of IKEEE
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    • v.23 no.1
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    • pp.193-199
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    • 2019
  • In this study, we have proposed a floating metal guard ring structure based on TCAD simulation in order to enhance the breakdown voltage characteristics of gallium oxide ($Ga_2O_3$) vertical high voltage switching Schottky barrier diode. Unlike conventional guard ring structures, the floating metal guard rings do not require an ion implantation process. The locally enhanced high electric field at the anode corner was successfully suppressed by the metal guard rings, resulting in breakdown voltage enhancement. The number of guard rings and their width and spacing were varied for structural optimization during which the current-voltage characteristics and internal electric field and potential distributions were carefully investigated. For an n-type drift layer with a doping concentration of $5{\times}10^{16}cm^{-3}$ and a thickness of $5{\mu}m$, the optimum guard ring structure had 5 guard rings with an individual ring width of $1.5{\mu}m$ and a spacing of $0.2{\mu}m$ between rings. The breakdown voltage was increased from 940 V to 2000 V without degradation of on-resistance by employing the optimum guard ring structure. The proposed floating metal guard ring structure can improve the device performance without requiring an additional fabrication step.

Annealed effect on the Optical and Electrical characteristic of a-IGZO thin films transistor.

  • Kim, Jong-U;Choe, Won-Guk;Ju, Byeong-Gwon;Lee, Jeon-Guk
    • Proceedings of the Materials Research Society of Korea Conference
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    • 2010.05a
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    • pp.53.2-53.2
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    • 2010
  • 지금까지 능동 구동 디스플레이의 TFT backplane에 사용하고 있는 채널 물질로는 수소화된 비정질 실리콘(a-Si:H)과 저온 폴리실리콘(low temperature poly-Si)이 대표적이다. 수소화된 비정질 실리콘은 TFT-LCD 제조에 주로 사용되는 물질로 제조 공정이 비교적 간단하고 안정적이며, 생산 비용이 낮고, 소자 간 특성이 균일하여 대면적 디스플레이 제조에 유리하다. 그러나 a-Si:H TFT의 이동도(mobility)가 1 cm2/Vs이하로 낮아 Full HD 이상의 대화면, 고해상도, 고속 동작을 요구하는 UD(ultra definition)급 디스플레이를 개발하는데 있어 한계 상황에 다다르고 있다. 또한 광 누설 전류(photo leakage current)의 발생을 억제하기 위해서 화소의 개구율(aperture ratio)을 감소시켜야하므로 패널의 투과율이 저하되고, 게이트 전극에 지속적으로 바이어스를 인가 시 TFT의 문턱전압(threshold voltage)이 열화되는 문제점을 가지고 있다. 문제점을 극복하기 위한 대안으로 근래 투명 산화물 반도체(transparent oxide semiconductor)가 많은 관심을 얻고 있다. 투명 산화물 반도체는 3 eV 이상의 높은 밴드갭(band-gap)을 가지고 있어 광 흡수도가 낮아 투명하고, 광 누설 전류의 영향이 작아 화소 설계시 유리하다. 최근 다양한 조성의 산화물 반도체들이 TFT 채널 층으로의 적용을 목적으로 활발하게 연구되고 있으며 ZnO, SnO2, In2O3, IGO(indium-gallium oxide), a-ZTO(amorphous zinc-tin-oxide), a-IZO (amorphous indium-zinc oxide), a-IGZO(amorphous indium-galliumzinc oxide) 등이 그 예이다. 이들은 상온 또는 $200^{\circ}C$ 이하의 낮은 온도에서 PLD(pulsed laser deposition)나 스퍼터링(sputtering)과 같은 물리적 기상 증착법(physical vapor deposition)으로 손쉽게 증착이 가능하다. 특히 이중에서도 a-IGZO는 비정질임에도 불구하고 이동도가 $10\;cm2/V{\cdot}s$ 정도로 a-Si:H에 비해 월등히 높은 이동도를 나타낸다. 이와 같이 a-IGZO는 비정질이 가지는 균일한 특성과 양호한 이동도로 인하여 대화면, 고속, 고화질의 평판 디스플레이용 TFT 제작에 적합하고, 뿐만 아니라 공정 온도가 낮은 장점으로 인해 플렉시블 디스플레이(flexible display)의 backplane 소재로서도 연구되고 있다. 본 실험에서는 rf sputtering을 이용하여 증착한 a-IGZO 박막에 대하여 열처리 조건 변화에 따른 a-IGZO 박막들의 광학적, 전기적 특성변화를 살펴보았고, 이와 더불어 a-IGZO 박막을 TFT에 적용하여 소자의 특성을 분석함으로써, 열처리에 따른 Transfer Curve에서의 우리가 요구하는 Threshold Voltage(Vth)의 변화를 관찰하였다.

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Comparative Analysis on Positive Bias Stress-Induced Instability under High VGS/Low VDS and Low VGS/High VDS in Amorphous InGaZnO Thin-Film Transistors

  • Kang, Hara;Jang, Jun Tae;Kim, Jonghwa;Choi, Sung-Jin;Kim, Dong Myong;Kim, Dae Hwan
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.15 no.5
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    • pp.519-525
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    • 2015
  • Positive bias stress-induced instability in amorphous indium-gallium-zinc-oxide (a-IGZO) bottom-gate thin-film transistors (TFTs) was investigated under high $V_{GS}$/low $V_{DS}$ and low $V_{GS}$/high $V_{DS}$ stress conditions through incorporating a forward/reverse $V_{GS}$ sweep and a low/high $V_{DS}$ read-out conditions. Our results showed that the electron trapping into the gate insulator dominantly occurs when high $V_{GS}$/low $V_{DS}$ stress is applied. On the other hand, when low $V_{GS}$/high $V_{DS}$ stress is applied, it was found that holes are uniformly trapped into the etch stopper and electrons are locally trapped into the gate insulator simultaneously. During a recovery after the high $V_{GS}$/low $V_{DS}$ stress, the trapped electrons were detrapped from the gate insulator. In the case of recovery after the low $V_{GS}$/high $V_{DS}$ stress, it was observed that the electrons in the gate insulator diffuse to a direction toward the source electrode and the holes were detrapped to out of the etch stopper. Also, we found that the potential profile in the a-IGZO bottom-gate TFT becomes complicatedly modulated during the positive $V_{GS}/V_{DS}$ stress and the recovery causing various threshold voltages and subthreshold swings under various read-out conditions, and this modulation needs to be fully considered in the design of oxide TFT-based active matrix organic light emitting diode display backplane.

Effects of Al-doping on IZO Thin Film for Transparent TFT

  • Bang, J.H.;Jung, J.H.;Song, P.K.
    • Proceedings of the Korean Vacuum Society Conference
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    • 2011.02a
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    • pp.207-207
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    • 2011
  • Amorphous transparent oxide semiconductors (a-TOS) have been widely studied for many optoelectronic devices such as AM-OLED (active-matrix organic light emitting diodes). Recently, Nomura et al. demonstrated high performance amorphous IGZO (In-Ga-Zn-O) TFTs.1 Despite the amorphous structure, due to the conduction band minimum (CBM) that made of spherically extended s-orbitals of the constituent metals, an a-IGZO TFT shows high mobility.2,3 But IGZO films contain high cost rare metals. Therefore, we need to investigate the alternatives. Because Aluminum has a high bond enthalpy with oxygen atom and Alumina has a high lattice energy, we try to replace Gallium with Aluminum that is high reserve low cost material. In this study, we focused on the electrical properties of IZO:Al thin films as a channel layer of TFTs. IZO:Al were deposited on unheated non-alkali glass substrates (5 cm ${\times}$ 5 cm) by magnetron co-sputtering system with two cathodes equipped with IZO target and Al target, respectively. The sintered ceramic IZO disc (3 inch ${\phi}$, 5 mm t) and metal Al target (3 inch ${\phi}$, 5 mm t) are used for deposition. The O2 gas was used as the reactive gas to control carrier concentration and mobility. Deposition was carried out under various sputtering conditions to investigate the effect of sputtering process on the characteristics of IZO:Al thin films. Correlation between sputtering factors and electronic properties of the film will be discussed in detail.

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Solution-Processed Fluorine-Doped Indium Gallium Zinc Oxide Channel Layers for Thin-Film Transistors (용액공정용 불소 도핑된 인듐 갈륨 징크 산화물 반도체의 박막 트랜지스터 적용 연구)

  • Jeong, Sunho
    • Journal of the Microelectronics and Packaging Society
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    • v.26 no.3
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    • pp.59-62
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    • 2019
  • In this study, we have developed solution-processed, F-doped In-Ga-Zn-O semiconductors and investigated their applications to thin-film transistors. In order for forming the appropriate channel layer, precursor solutions were formulated by dissolving the metal salts in the designated solvent and an additive, ammonium fluoride, was incorporated additionally as a chemical modifier. We have studied thermal and chemical contributions by a thermal annealing and an incorporation of chemical modifier, from which it was revealed that electrical performances of the thin-film transistors comprising the channel layer annealed at a low temperature can be improved significantly along with an addition of ammonium fluoride. As a result, when the 20 mol% fluorine was incorporated into the semiconductor layer, electrical characteristics were accomplished with a field-effect mobility of $1.2cm^2/V{\cdot}sec$ and an $I_{on}/_{off}$ of $7{\times}10^6$.