• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.28 no.5
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• pp.366-372
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• 2017

In this paper, the analysis of baluns that are inevitably required to design a differential low noise amplifier, The balun converts a single signal input from the antenna into a differential signal, which serves as an input to the differential amplifier. In addition, it protects the circuit from ESD(Electrostatic Discharge) coming through the antenna and helps with input matching. However, in the case of a passive balun used in general, since the AC signal is transmitted through electromagnetic coupling formed between two metal lines, it not only has loss without gain but also has the greatest influence on the total noise figure of the receiving end. Therefore, the design of a balun in a low-noise amplifier is very important, and it is important to design a balun in consideration of line width, line spacing, winding, radius, and layout symmetry that are necessary. In this paper, the factors to be considered for improving the quality factor of balun are summarized, and the tendency of variation of resistance, inductance, and capacitance of the balun according to design element change is analyzed. Based on the analysis results, it is proved that the design of input balun allows the design of low noise, high gain differential amplifier with gain of 24 dB and noise figure of 2.51 dB.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.12
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• pp.80-87
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• 2013

A novel instrumentation amplifier(IA) using positive polarity current-conveyor(CCII+) for electronic measurement systems with low cost, wideband, and gain control with wide range is designed. The IA consists of two CCII+, three resistor, and an operational amplifier(op-amp). The principal of the operating is that the difference of two input voltages applied into two CCII+ used voltage and current follower converts into same currents, and then these current drive resistor of (+) terminal and feedback resistor of op-amp to obtain output voltage. To verify operating principal of the IA, we designed the CCII+ and used commercial op-amp LF356. Simulation results show that voltage follower used CCII+ has offset voltage of 0.21mV at linear range of ${\pm}$4V. The IA had wide gain range from -20dB to 60dB by variation of only one resistor and -3dB frequency for the gain of 60dB was 400kHz. The IA also has merits without matching of external resistor and controllable offset voltage using the other resistor. The power dissipation of the IA is 130mW at supply voltage of ${\pm}$5V.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.14 no.4
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• pp.1908-1914
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• 2013

In this paper, we introduce a design method for a broadband planar quasi-Yagi antenna (QYA) for terrestrial digital television (DTV) reception. The coplanar strip line which feeds the driver dipole is connected to a microstrip line and is terminated by short circuit. By appending a wide strip-type rectangular director at a location close to the driver dipole, broadband impedance matching and gain enhancement in a high frequency region are obtained. The gain characteristics in a low frequency region are improved by adding a reflector formed by a truncated ground plane. To reduce the antenna size, the strip-type dipole and reflector are modified to half bow-tie (V)-shaped elements. The effects of various parameters on the antenna characteristics are examined. An antenna, as a design example for the proposed antenna, is designed for the operation in the frequency band of 470-806 MHz for terrestrial DTV. The optimized antenna is fabricated on an FR4 substrate and the experimental results show that the antenna has a good performance such as a frequency band of 450-848 MHz for a VSWR < 2, gain > 4.1 dBi, and front-to-back ratio > 10.4 dB.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.43 no.12 s.354
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• pp.55-64
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• 2006

This work proposes a calibration-free 14b 70MS/s 0.13um CMOS ADC for high-performance integrated systems such as WLAN and high-definition video systems simultaneously requiring high resolution, low power, and small size at high speed. The proposed ADC employs signal insensitive 3-D fully symmetric layout techniques in two MDACs for high matching accuracy without any calibration. A three-stage pipeline architecture minimizes power consumption and chip area at the target resolution and sampling rate. The input SHA with a controlled trans-conductance ratio of two amplifier stages simultaneously achieves high gain and high phase margin with gate-bootstrapped sampling switches for 14b input accuracy at the Nyquist frequency. A back-end sub-ranging flash ADC with open-loop offset cancellation and interpolation achieves 6b accuracy at 70MS/s. Low-noise current and voltage references are employed on chip with optional off-chip reference voltages. The prototype ADC implemented in a 0.13um CMOS is based on a 0.35um minimum channel length for 2.5V applications. The measured DNL and INL are within 0.65LSB and l.80LSB, respectively. The prototype ADC shows maximum SNDR and SFDR of 66dB and 81dB and a power consumption of 235mW at 70MS/s. The active die area is $3.3mm^2$.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.16 no.12
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• pp.8643-8648
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• 2015

In this paper presents the design and demonstrate 8 W 3-stage HPA(High Power Amplifier) MMIC(Monolithic Microwave Integrated Circuits) for Ka-band down link satellite communications payload system at 19.5 GHz ~ 22 GHz frequency band. The HPA MMIC consist of 3-stage GaN HEMT(Hight Electron Mobility Transistors). The gate periphery of $1^{st}$ stage, $2^{nd}$ stage and output stage is determined $8{\times}50{\times}2$ um, $8{\times}50{\times}4$ um and $8{\times}50{\times}8$ um, respectively. The fabricated HPA MMIC shows size $3,400{\times}3,200um^2$, small signal gain over 29.6 dB, input matching -8.2 dB, output matching -9.7 dB, output power 39.1 dBm and PAE 25.3 % by using 0.15 um GaN technology at 20 V supply voltage in 19.5~22 GHz frequency band. Therefore, this HPA MMIC is believed to be adaptable Ka-band satellite communication payloads down link system.

• Journal of Navigation and Port Research
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• v.31 no.6
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• pp.503-507
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• 2007

In this paper, the ultra-widebend, microstrip patch antenna with the bandwidth of 3 GHz was implemented for ultra-wideband(UWB) wireless communication applications. In order to cover the very wide bandwidth of 3 GHz, a multi-resonance antenna was designed, each resonance frequency was separated into five frequency bend, 7.5, 8.1, 8.7, 9.3, and 9.9GHz with the interval of 600MHz BW. And for wideband characteristics of each antenna, U-slot antennas were designed at each center frequency. Designed five U-slot antennas were connected in series for multi-resonance of 3GHz BW and wideband matching was also designed for impedance matching transmission line calculated. The relative dielectric constant, the height, the loss tangent of the PCB substrate were ${\epsilon}_r=4.8,\;h=0.6$ and loss tangent=0.0009 respectively. The implemented antenna's radiation patterns and gain were directivity characteristics and $1.46{\sim}4.08dBi$ at the five separated center frequency.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.44 no.8
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• pp.42-50
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• 2007

This paper presents design methods for dual-frequency(2.4/5.8GHz) active receiving antennas. The proposed active receiving antennas are designed to interconnect the output port of a wideband antenna to the input port of an active device of High Electron Mobility Transistor directly and to receive RF signals of 2.4GHz and 5.2GHz simultaneously where the impedance matching conditions are optimized by adjusting the length of $1/20{\lambda}_0$(@5.8GHz) CPW transmission line in the planar antenna The bandwidth of implemented dual-frequency active receiving antennas is measured in the range of 2.0GHz to 3.1GHz and 5.25GHz to 5.9GHz. Gains are measured of 17.0dB at 2.4GHz and 15.0dB at 5.2GHz. The measured noise figure is 1.5dB at operating frequencies.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.17 no.3 s.106
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• pp.249-258
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• 2006

In this letter, we propose a novel printed helix antenna for RFID reader in UHF band. The printed strip line of the antenna is first wound up outside a polygonal shaped layer and then the winding continues on an inner layer to control the overall gain and the radiation pattern. In addition, the winding pitch angles on each layer have either negative or positive values resulting in the broad CP bandwidth. The detail structure of the antenna was optimized using Pareto genetic algorithm(GA), so as to obtain excellent performances for RFID reader antennas. The optimized two-layered polygonal helix was fabricated on the cardboard of a flexible substrate and the performances were measured and compared with the simulations. The fabricated antenna was made up of copper tape which can adhere to a flexible cardboard and had 21.4 % matching bandwidth, 31.9 % CP bandwidth, readable range of $5.5m^2$ with kr=3.2. Also based on the current distribution of the strip line of the antenna and sensitivity of the antenna bents points, we confirmed that the antenna has the quarter-wave transformer near the feed for the broad matching bandwidth and radiates the traveling wave for the broad CP bandwidth using the bent strip line.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.30 no.2
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• pp.104-110
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• 2019

In this paper, a complementary metal oxide semiconductor(CMOS) power amplifier(PA) integrated circuit operating in the 900 MHz band for long-term evolution(LTE) communication systems is presented. The output matching network based on a transformer was implemented on a printed circuit board for low loss. Simultaneously, to achieve high efficiency of the PA, the second harmonic impedances are controlled. The CMOS PA was fabricated using a $0.18{\mu}m$ CMOS process and measured using an LTE uplink signal with a bandwidth of 10 MHz and peak to average power ratio of 7.2 dB for verification. The implemented CMOS PA module exhibits a power gain of 24.4 dB, power-added efficiency of 34.2%, and an adjacent channel leakage ratio of -30.1 dBc at an average output power level of 24.3 dBm.

• Journal of Korea Entertainment Industry Association
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• v.13 no.4
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• pp.93-106
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• 2019

Persona is an actor's external ego constructed by playing various roles, and his/her another self-portrait in the eyes of the audience. This study was conducted to analyze persona identity containing core persona(CP) and to gain implications for the growth strategy of the actress Son Ye-jin called "melo queen" by verifying consistency between the CP and audience responses to her starring works of the past. According to the related theories and models, the persona was firstly set as image, visuality, personality and consistency, and it was used to extract and sort descriptive texts about Son related news articles in the last 5 years of the six major Korean newspapers using the content analysis method. After that, we analyzed the number of viewers of her movies and the audience share of her dramas by genre. As a result, Son's persona components were found to have a proportion for 54.2% images (34.0% for melo and romance images, 20.2% for non-melo and romance images), 25.6% for visibility, 13.8% for consistency, and 6.4% for personality. Her CP was derived from a melo and romance image. Comparing this with the audience reaction, the melo romance genre dominated and showed consistency in the drama, but in the case of the film, the non-melo romance was dominant and did not match each other. The results were attributed to a wide gap between dramas and movies in terms of key viewers, box office factors, degree of genre hybridity and experimentality. Therefore, Son should actively use her CP in the drama and challenge the various roles in order to expand her persona spectrum in the film.