• Title/Summary/Keyword: Gain matching

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Gain Scheduled State Feedback and Disturbance Feedforward Control for Systems with Bounded Control Input - Application (제어입력 크기제한을 갖는 시스템에서 이득 스케줄 상태되먹임-외란앞먹임 제어 - 적용)

  • Kang, Min-Sig;Yoon, Woo-Hyun
    • Journal of the Korean Society for Precision Engineering
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    • v.24 no.12
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    • pp.65-73
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    • 2007
  • In this paper, the gain scheduled state feedback and disturbance feedforward control design proposed in the previous paper has been applied to a simple matching system and a turret stabilization system. In such systems, it is needed to attenuate disturbance response effectively as long as control input satisfies the given constraint on its magnitude. The scheduled control gains are derived in the framework of linear matrix inequality(LMI) optimization by means of the MatLab toolbox. Its effectiveness is verified along with the simulation results compared with the conventional optimum constant gain control and the scheduled state feedback control cases.

An X-Ku Band Distributed GaN LNA MMIC with High Gain

  • Kim, Dongmin;Lee, Dong-Ho;Sim, Sanghoon;Jeon, Laurence;Hong, Songcheol
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.14 no.6
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    • pp.818-823
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    • 2014
  • A high-gain wideband low noise amplifier (LNA) using $0.25-{\mu}m$ Gallium-Nitride (GaN) MMIC technology is presented. The LNA shows 8 GHz to 15 GHz operation by a distributed amplifier architecture and high gain with an additional common source amplifier as a mid-stage. The measurement results show a flat gain of $25.1{\pm}0.8dB$ and input and output matching of -12 dB for all targeted frequencies. The measured minimum noise figure is 2.8 dB at 12.6 GHz and below 3.6 dB across all frequencies. It consumes 98 mA with a 10-V supply. By adjusting the gate voltage of the mid-stage common source amplifier, the overall gain is controlled stably from 13 dB to 24 dB with no significant variations of the input and output matching.

A study on the design technologies for the 1-state 23GHz LNAs (23GHz대 1단 저잡음 증폭기의 설계 기술에 관한 연구)

  • 장동필;안동식
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.22 no.5
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    • pp.974-980
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    • 1997
  • The 23GHz 1-state LNA was designed by using MPIE numerical analysis and conventional design EEsof softwares. The circuit was designed using conventional tools but analyzed and modified by using numerical MPIE tools. he matching sections was designed with parallel coupled filter-type, which gives impedance matching and DC blocking and has small discontinuities. THe FET chip is directly attached to the graound metal. The designed LNA gives 5.8dB gain and 2.5dB noise figure withoug considering the loss and impedance shift of connectors that degenerate the gain and noise figure considerably. this results gives very promising characteristics for our design process and matching schemes and fabrication technologies.

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A Study on the Broadband Microwave Amplifier Design Using Potentially Unstable GaAs FET (Potentially Unstable한 GaAs FET를 이용한 광대역 마이크로파증폭기에 관한 연구)

  • Hong, Jae-Pyo;Cho, Young-Ki;Son, Hyon
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.12 no.1
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    • pp.19-26
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    • 1987
  • The broadband microwave amplifier in the 3~4GHz frequency range has been designed by using potentially unstable GaAs FET. Input matching network is designed by 14dB available power gain circles which are in the stable region. In order to obtain maximu, transducer power gain, output matching network which is in the stable region can be designed using Fano's bandpass matching network. The measured values of transducer power gain, $S_11$and $S_22$ show close agreements with the theoretical valuse.

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6-18 GHz MMIC Drive and Power Amplifiers

  • Kim, Hong-Teuk;Jeon, Moon-Suk;Chung, Ki-Woong;Youngwoo Kwon
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.2 no.2
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    • pp.125-131
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    • 2002
  • This paper presents MMIC drive and power amplifiers covering 6-18 ㎓. For simple wideband impedance matching and less sensitivity to fabrication variation, modified distributed topologies are employed in the both amplifiers. Cascade amplifiers with a self-biasing circuit through feedback resistors are used as unit gain blocks in the drive amplifier, resulting in high gain, high stability, and compact chip size. Self impedance matching and high-pass, low-pass impedance matching networks are used in the power amplifier. In measured results, the drive amplifier showed good return losses ($S_11,{\;}S_{22}{\;}<{\;}-10.5{\;}dB$), gain flatness ($S_{21}={\;}16{\;}{\pm}0.6{\;}dB$), and $P_{1dB}{\;}>{\;}22{\;}dBm$ over 6-18 GHz. The power amplifier showed $P_{1dB}{\;}>{\;}28.8{\;}dBm$ and $P_{sat}{\;}{\approx}{\;}30.0{\;}dBm$ with good small signal characteristics ($S_{11}<-10{\;}dB,{\;}S_{22}{\;}<{\;}-6{\;}dB,{\;}and{\;}S_{21}={\;}18.5{\;}{\pm}{\;}1.25{\;}dB$) over 6-18 GHz.

Robust PID Controller Tuning Technique and Applicationi to Speed Controller Design for BLDC Motors (견실 PID 제어기 조정기법 및 BLDC 모터의 속도제어기 설계에의 응용)

  • Kim, In-Soo;Lee, Young-Jin;Park, Sung-Jun;Park, Han-Woong;Lee, Man-Hyung
    • Journal of the Korean Society for Precision Engineering
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    • v.17 no.8
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    • pp.126-133
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    • 2000
  • This paper is a study on robust PID controller tuning technique using the frequency region model matching method.To design the robust PID controller satisfying disturbance attenuation and robust tracking property for a reference input first an {{{{ETA _$\infty$}}}} controller satisfying given performances is designed using an H$_{\infty}$ control method, And then the parameters(proportional gain integral gain and derivation gain) of the robust PID controller with the performances of the desinged H$_{\infty}$ controller are determined using the model matching method at frequency domain. in this paper this PID controller tuning technique is applied to PID speed controller design for BLDC motors. Consequently simulation results show that the proposed PID speed controller satisfies load torque disturbance attenuation and robust tracking property and this study has usefulness and applicability for the speed control system; design of BLDC motors.

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The Design of High Cain Channel Amplifier for Terrestial Repeater of Digital Satellite Broadcasting (디지털 위성방송 지상 리피터용 고 이득 채널 증폭기 설계)

  • 이강훈;이영철
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.7 no.3
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    • pp.485-491
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    • 2003
  • In this paper, We designed the multi-stage amplifier having high gain/low noise characteristics for terrestial repeater of direct digital satellite broadcasting system. In the design the amplifier, we optimized the parameters to have the stable operation between gain, noise figure and stability. The first stage of amplifier can be specified low noise impedance matching, 2nd stage to 5th stage show constant gain and stable operation and final stage of amplifier shows high gain impedance matching. As a result of experiment at the frequency of digital satellite terrestial, show 68dB gain under 2,4dB noise figure and 63dB dynamic range in the 11.7GHz-12.7GHz frequency range, it is a good agreement of communication channel amplifier requirements for satellite terrestial repeater.

Design of a $3.1{\sim}10.6GHz$ CMOS Power Amplifier for UWB Application (UWB 응용을 위한 $3.1{\sim}10.6GHz$ CMOS 전력증폭기 설계)

  • Park, J.K.;Shim, S.M.;Park, J.T.;Yu, C.G.
    • Proceedings of the KIEE Conference
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    • 2007.10a
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    • pp.193-194
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    • 2007
  • This paper presents the design of a power amplifier for full-band UWB application systems using a CMOS 0..18um technology. A wideband RLC filter and a multilevel RLC matching scheme are utilized to achieve the wideband input/output matching. Both the cascade and cascode stage are used to increase the gain and to achieve gain flatness. Simulation results show that the designed amplifier provides a power gain greater than 10 dB throughout the UWB full-band(3.1-10.6GHz) and an input P1dB of -1.2dBm at 6.9GHz. It consumes 35.8mW from a 1.8V supply.

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Joint Subcarrier Matching and Power Allocation in OFDM Two-Way Relay Systems

  • Vu, Ha Nguyen;Kong, Hyung-Yun
    • Journal of Communications and Networks
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    • v.14 no.3
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    • pp.257-266
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    • 2012
  • A decode-and-forward two-way relay system benefits from orthogonal frequency division multiplexing (OFDM) and relay transmission. In this paper, we consider a decode-and-forward two-way relay system over OFDMwith two strategies: A joint subcarrier matching algorithm and a power allocation algorithm operating with a total power constraint for all subcarriers. The two strategies are studied based on average capacity using numerical analysis by uniformly allocating power constraints for each subcarrier matching group. An optimal subcarrier matching algorithm is proposed to match subcarriers in order of channel power gain for both transmission sides. Power allocation is defined based on equally distributing the capacity of each hop in each matching group. Afterward, a modified water-filling algorithm is also considered to allocate the power among all matching groups in order to increase the overall capacity of the network. Finally, Monte Carlo simulations are completed to confirm the numerical results and show the advantages of the joint subcarrier matching, power allocation and water filling algorithms, respectively.

Monolithic SiGe Up-/Down-Conversion Mixers with Active Baluns

  • Lee, Sang-Heung;Lee, Seung-Yun;Bae, Hyun-Cheol;Lee, Ja-Yol;Kim, Sang-Hoon;Kim, Bo-Woo;Kang, Jin-Yeong
    • ETRI Journal
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    • v.27 no.5
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    • pp.569-578
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    • 2005
  • The purpose of this paper is to describe the implementation of monolithically matching circuits, interface circuits, and RF core circuits to the same substrate. We designed and fabricated on-chip 1 to 6 GHz up-conversion and 1 to 8 GHz down-conversion mixers using a 0.8 mm SiGe hetero-junction bipolar transistor (HBT) process technology. To fabricate a SiGe HBT, we used a reduced pressure chemical vapor deposition (RPCVD) system to grow a base epitaxial layer, and we adopted local oxidation of silicon (LOCOS) isolation to separate the device terminals. An up-conversion mixer was implemented on-chip using an intermediate frequency (IF) matching circuit, local oscillator (LO)/radio frequency (RF) wideband matching circuits, LO/IF input balun circuits, and an RF output balun circuit. The measured results of the fabricated up-conversion mixer show a positive power conversion gain from 1 to 6 GHz and a bandwidth of about 4.5 GHz. Also, the down-conversion mixer was implemented on-chip using LO/RF wideband matching circuits, LO/RF input balun circuits, and an IF output balun circuit. The measured results of the fabricated down-conversion mixer show a positive power conversion gain from 1 to 8 GHz and a bandwidth of about 4.5 GHz.

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