• JSTS:Journal of Semiconductor Technology and Science
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• 제17권2호
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• pp.223-229
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• 2017

This paper analyzes the effect of a dual-metal-gate structure on the electrical characteristics of AlGaN/GaN metal-insulator-semiconductor high electron mobility transistors. These structures have two gate metals of different work function values (${\Phi}$), with the metal of higher ${\Phi}$ in the source-side gate, and the metal of lower ${\Phi}$ in the drain-side gate. As a result of the different ${\Phi}$ values of the gate metals in this structure, both the electric field and electron velocity in the channel become better distributed. For this reason, the transconductance, current collapse phenomenon, breakdown voltage, and radio frequency characteristics are improved. In this work, the devices were designed and analyzed using a 2D technology computer-aided design simulation tool.

• ETRI Journal
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• 제39권2호
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• pp.292-299
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• 2017

We propose pulse-mode dynamic $R_on$ measurement as a method for analyzing the effect of stress on large-scale high-power AlGaN/GaN HFETs. The measurements were carried out under the soft-switching condition (zero-voltage switching) and aimed to minimize the self-heating problem that exists with the conventional hard-switching measurement. The dynamic $R_on$ of the fabricated AlGaN/GaN MIS-HFETs was measured under different stabilization time conditions. To do so, the drain-gate bias is set to zero after applying the off-state stress. As the stabilization time increased from $ 0.1{\mu}s$ to 100 ms, the dynamic $R_on$ decreased from $160\Omega$ to $2\Omega$. This method will be useful in developing high-performance GaN power FETs suitable for use in high-efficiency converter/inverter topology design.

• 한국재료학회지
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• 제28권5호
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• pp.268-272
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• 2018

An $Al_2O_3/AlN$ bilayer deposited on GaN by atomic layer deposition (ALD) is employed to prepare $Al_2O_3/AlN/GaN$ metal-insulator-semiconductor (MIS) diodes, and their interfacial properties are investigated using X-ray photoelectron spectroscopy (XPS) with sputter etch treatment and current-voltage (I-V) measurements. XPS analyses reveal that the native oxides on the GaN surface are reduced significantly during the early ALD stage, indicating that AlN deposition effectively clelans up the GaN surface. In addition, the suppression of Al-OH bonds is observed through the ALD process. This result may be related to the improved device performance because Al-OH bonds act as interface defects. Finally, temperature dependent I-V analyses show that the barrier height increases and the ideality factor decreases with an increase in temperature, which is associated with the barrier inhomogeneity. A Modified Richardson plot produces the Richardson constant of $A^{**}$ as $30.45Acm^{-2}K^{-2}$, which is similar to the theoretical value of $26.4Acm^{-2}K^{-2}$ for n-GaN. This indicates that the barrier inhomogeneity appropriately explains the forward current transport across the $Au/Al_2O_3/AlN/GaN$ interface.

• 전자공학회논문지A
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• 제31A권9호
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• pp.72-77
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• 1994

GaAs MISFETs, with photo-CVD grown P$_{3}$N$_{5}$ gate insulator and sulfide treatment, have been fabricated and showed the instability of drain current reduced less than 22 percent for the period of 1.0s~1.0${\times}10^{4}s$. The effective electron mobility and extrinsic transconductance of the device are about 1300cm$^{2}$/V.sec and 1.33mS at room temperature. The C-V characteristics of GaAs MIS Diode and AES analysis are also discussed with respect to effect of sulfide treatment conditions.

• 한국전기전자재료학회논문지
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• 제20권1호
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• pp.8-13
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• 2007

In MIS capacitor structure, we have studied the electrical properties in Ammonium Sulfide solution treatment while AIN thin film as a insulator is being formed by reactive sputtering method. The deposition process conditions of AIN thin film we temperature $250^{\circ}C$, DC Power 150 W, pressure 5 mTorr and 8 sccm(Ar : 4 sccm, $N_{2}$ : 4 sccm). The surface of GaAs was treated with Ammonium Sulfide solution, it was shown the leakage current was less than $10^{-8}\;A/cm^{2}$. The deep depletion phenomena of inverse area with treating Ammonium Sulfide solution in C-V analysis was improved as compared the condition of without Ammonium Sulfide solution and hysteresis property as well.

• 한국전기전자재료학회논문지
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• 제13권5호
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• pp.365-370
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• 2000

Schottky contacts on n-In$\_$0.53//Ga$\_$0.47//As have been made by metal deposition on substrates cooled to a temperature of 77K. The current-voltage and capacitance-voltage characteristics showed that the Schottky diodes formed at low temperature had a much improved barrier height compared to those formed at room temperature. The Schottky barrier height ø$\_$B/ was found to be increased from 0.2eV to 0.6eV with Ag metal. The saturation current density of the low temperature diode was about 4 orders smaller than for the room temperature diode. A current transport mechanism dominated by thermionic emission over the barrier for the low temperature diode was found from current-voltage-temperature measurement. Deep level transient spectroscopy studies exhibited a bulk electron trap at E$\_$c/-0.23eV. The low temperature process appears to reduce metal induced surface damage and may form an MIS (metal-insulator-semiconductor)-like structure at the interface.

• Korean Chemical Engineering Research
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• 제60권2호
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• pp.313-319
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• 2022

HfO₂을 게이트 산화막으로 갖는 AlGaN/GaN 기반 고이동도 전계효과 트랜지스터(high electron mobility transistor, HEMT)의 노멀리 오프(normally-off) 작동 구현을 위하여 게이트 리세스(gate-recess) 깊이에 따른 소자 특성이 시뮬레이션을 통하여 분석되었다. 전통적인 HEMT 구조, 3 nm의 두께를 갖는 게이트 리세스된 HEMT 구조, 게이트 영역에 AlGaN 층을 갖지 않는 HEMT 구조가 모사되었다. 전통적인 HEMT 구조는 노멀리 온(normally-on) 특성을 나타내었으며, 0 V의 게이트 전압 및 15 V의 드레인 전압 환경에서 0.35 A의 드레인 전류 특성을 나타내었다. 3 nm의 두께를 갖는 게이트 리세스된 HEMT 구조는 2DEG(2-dimensional electron gas) 채널의 전자 농도 감소로 인해, 같은 전압 인가 조건에서 0.15 A의 드레인 전류 값을 보였다. 게이트 영역에 AlGaN 층을 갖지 않는 HEMT 구조는 뚜렷한 노멀리 오프 동작을 나타내었으며, 0 V의 동작전압 값을 확인할 수 있었다.

• 대한전자공학회논문지SD
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• 제39권1호
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• pp.83-88
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• 2002

HFET 소자의 선형성과 게이트-트레인 항복특성을 향상시키기 위해 부분채널 도핑된 Al/sub 0.25/Ga/sub 0.75/As/In/sub 0.25/Ga/sub 0.75/As/Al/sub 0.25/Ga/sub 0.75/As 이종접합 구조를 갖는 FET를 제안하였다. 제안된 HFET는 게이트 전극 아래로 도핑되지 않은 AlGaAs 진성공급층을 두어 -2OV 의 높은 항복전압을 얻었다. 또한 소자의 InGaAs 채널에 부분 도핑을 실시하여, 균일 채널 도핑을 실시한 경우보다 향상된 선형성을 유도하였고, 2차원 전산모사 견과와 제작 및 측정결과를 통해 선형성의 향상을 확인하였다. 본 실험에서 제안된 HFET소자는 DC측정 결과와 고주파측정 결과 모두에서 기존의 FET소자들에 비해 향상된 선형성을 나타내었다.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2012년도 제42회 동계 정기 학술대회 초록집
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• pp.161-161
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• 2012

질화티타늄(Titanium Nitride, TiN)은 화학적 안정성이 우수하고, N/Ti 원소 비율에 따라 열전도성 및 전기전도성이 변화하는 특성을 가지고 있어서 Metal Insulator Silicon (MIS) 나 Metal Insulator Metal (MIM) capacitor의 metal electrode 물질로 적용되고 있다. $TiCl_4$와 $NH_3$ gas를 이용하여 $500^{\circ}C$ 이상의 고온 조건에서 Chemical Vapor Deposition (CVD) 법으로 TiN 박막을 증착하는 방식이 가장 널리 사용되고 있으나, TiN 박막 내의 Chlorine (Cl) 원소가 SiO2 두께와 누설전류 밀도를 증가시키는 요인으로 작용하므로 Cl의 거동 및 함량 제어를 통한 전기적인 특성의 향상 평가가 요구되고 있다[1-3]. 본 실험에서는 $SiO_2$ 위에 TiN을 적층 한 구조에서 magnetic sector type의 Secondary Ion Mass Spectrometry (SIMS)를 이용하여 Cl 원소의 검출도 개선 방법을 연구하였다. 일반적인 $Cs^+$ 이온을 이용하여 $Cl^-$ 이온을 검출할 경우에는 TiN 하부에 $SiO_2$가 존재함에 따른 charging effect와 mass interference가 발생되는 문제점이 관찰되었다. 이를 개선하기 위해 Cl과 Cs 원소가 결합된 $ClCs^+$ cluster ion을 검출하는 방법을 시도하였으나, Cl- 이온 검출 방식에 비해 오히려 낮은 검출도를 나타내었으나 Cl 원소가 속하는 halogen 족 원소의 높은 전자 친화도 특성을 이용한 $ClCs_2^+$ cluster ion을 검출하는 방법[4]을 적용한 경우에는 $ClCs^+$ 방식에 비해 검출도가 3order 개선되는 결과를 확보하였으며, 이 결과를 토대로 Cl dose ($atoms/cm^2$) 와 Rs (ohm/sq) 간의 상관 관계에 대해 고찰하고자 한다.

• 센서학회지
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• 제13권2호
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• pp.128-132
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• 2004

Short wave infrared (SWIR) photovoltaic devices have been fabricated from metal organic vapour phase epitaxy (MOVPE) grown n- on p- HgCdTe films on GaAs substrates. The MOVPE grown films were processed into mesa type discrete devices with wet chemical etching employed for meas delineation and ZnS surface passivatlon. ZnS was thermally evaporated from effusion cell in an ultra high vacuum (UHV) chamber. The main features of the ZnS deposited from effusion cell in UHV chamber are low fixed surface charge density, and small hysteresis. It was found that a negative flat band voltage with -0.6 V has been obtained for Metal Insulator Semiconductor (MIS) capacitor which was evaporated at $910^{\circ}C$ for 90 min. Current-Voltage (I-V) and temperature dependence of the I-V characteristics were measured in the temperature range 80 - 300 K. The Zero bias dynamic resistance-area product ($R_{0}A$) was about $7500{\Omega}-cm^{2}$ at room temperature. The physical mechanisms that dominate dark current properties in the HgCdTe photodiodes are examined by the dependence of the $R_{0}A$ product upon reciprocal temperature. From theoretical considerations and known current expressions for thermal and tunnelling process, the device is shown to be diffusion limited up to 180 K and g-r limited at temperature below this.