• Journal of the Korean Crystal Growth and Crystal Technology
• /
• v.4 no.1
• /
• pp.11-20
• /
• 1994

GaAs and AlGaAs epi-layers were grown on semi-insulating (100) GaAs substrate by molecular beam epitaxy (MBE) and their electrical and optical properties have been investigated by several measurements. In undoped GaAs, the p-type GaAs layers with the good surface morphology were obtained under the growth conditions of the substrate temperatures ranging from 570 to $585^{\circ}C$ and the $As_4$/Ga ratios from 17 to 22. In the samples with the growth rates of the ranges of $0.9~1.1 {\mu}m/h$, the impurity concentrations were in the ranges of $1.5{\times}10^{14}~5.6{\times}10^{14}cm^{-3}$ with the Hall mobilities of $590~410cm^2/V-s$. In the Si-doped GaAs, the n-type GaAs layers with low electro trap, only two hole deep levels were observed with uniform doping profiles (<1%). AlGaAs layers with good surface morphology and crystallinity were grown under an optimum condition of the substrate temperature, $600^{\circ}C $. 8 deep level defects were observed between 0.17~0.85eV in undoped AlGaAs layers.

• Current Optics and Photonics
• /
• v.5 no.2
• /
• pp.129-133
• /
• 2021

This study observed the performance of an InAs/GaSb type-II superlattice photodiode with a p-i-n structure for mid-wavelength infrared detection. The 10 ML InAs/10 ML GaSb type-II superlattice photodiode was grown using molecular beam epitaxy. The cutoff wavelength of the manufactured photodiode with Si3N4 passivation on the mesa sidewall was determined to be approximately 5.4 and 5.5 ㎛ at 30 K and 77 K, respectively. At a bias of -50 mV, the dark-current density for the Si3N4-passivated diode was measured to be 7.9 × 10-5 and 1.1 × 10-4 A/㎠ at 77 K and 100 K, respectively. The differential resistance-area product RdA at a bias of -0.15 V was 1481 and 1056 Ω ㎠ at 77 K and 100 K, respectively. The measured detectivity from a blackbody source at 800 K was calculated to be 1.1 × 1010 cm Hz1/2/W at zero bias and 77 K.

• Korean Journal of Materials Research
• /
• v.13 no.11
• /
• pp.717-720
• /
• 2003

Heavily $p^{ ＋}$-typed ($10^{20}$ $cm^{-3}$ ) GaAs epilayers have been grown on high-index GaAs substrates with various crystallographic orientations from (100) to (111)A by a low-pressure metalorganic chemical vapor deposition. Carbon (C) tetrabromide (CBr$_4$) was used as a C source. At moderate growth temperatures and high V/III ratios, the hole concentration of C-doped GaAs epilayers shows the crystallographic orientation dependence. The bonding strength of As sites on a growing surface plays an important role in the C incorporation into the high-index GaAs substrates.

• Korean Journal of Materials Research
• /
• v.19 no.3
• /
• pp.132-136
• /
• 2009

This study investigates GaAs dry etching in capacitively coupled $BCl_3/N_2$ plasma at a low vacuum pressure (>100 mTorr). The applied etch process parameters were a RIE chuck power ranging from $100{\sim}200W$ on the electrodes and a $N_2$ composition ranging from $0{\sim}100%$ in $BCl_3/N_2$ plasma mixtures. After the etch process, the etch rates, RMS roughness and etch selectivity of the GaAs over a photoresist was investigated. Surface profilometry and field emission-scanning electron microscopy were used to analyze the etch characteristics of the GaAs substrate. It was found that the highest etch rate of GaAs was $0.4{\mu}m/min$ at a 20 % $N_2$ composition in $BCl_3/N_2$ (i.e., 16 sccm $BCl_3/4$ sccm $N_2$). It was also noted that the etch rate of GaAs was $0.22{\mu}m/min$ at 20 sccm $BCl_3$ (100 % $BCl_3$). Therefore, there was a clear catalytic effect of $N_2$ during the $BCl_3/N_2$ plasma etching process. The RMS roughness of GaAs after etching was very low (${\sim}3nm$) when the percentage of $N_2$ was 20 %. However, the surface roughness became rougher with higher percentages of $N_2$.

• Proceedings of the Materials Research Society of Korea Conference
• /
• 2009.05a
• /
• pp.26.2-26.2
• /
• 2009

이 논문은 반응성 $BCl_3$ 플라즈마로 GaAs의 건식 식각을 진행한 후 그 결과에 대하여 연구 분석 한 것이다. 이 때 사용한 식각 공정 변수는 $BCl_3$ 플라즈마에서의 가스유량, 공정 압력과 RIE 척 파워의 변화이다. 먼저 공정 압력을 75 mTorr 고정시킨 후 $BCl_3$ 유량을 변화 (2.5~10 sccm)해서 실험하였다. 또한 BCl3의 유량을 5 sccm으로 고정시킨 후 공정압력을 변화(47~180 mTorr)해서 식각 실험을 실시하였다. 마지막으로 47 mTorr와 100 mTorr 의 각각의 공정압력에서 RF 척 파워를 변화시켜 (50~200 W) 실험하였다. GaAs 플라즈마 식각이 끝난 후 표면단차 측정기 (Surface profiler)를 사용하여 표면의 단차와 거칠기를 분석하였다. 그 후 그 결과를 이용하여 식각율 (Etch rate), 식각 표면 거칠기 (RMS roughness), 식각 선택비 (Selectivity) 등의 식각 특성평가를 하였다. 또한 식각 공정 중에 샘플 척에 발생하는 자기 바이어스와 $BCl_3$ 플라즈마 가스를 광학 발광 분석기 (Optical Emission Spectroscopy)를 이용하여 플라즈마의 상태를 실시간으로 분석하였다. 이 실험 결과에 따르면 공정 압력의 증가는 샘플 척의 자기 바이어스의 값을 감소시켰다. $BCl_3$ 압력 변화에 의한 GaAs의 식각 결과를 정리하면 5 sccm의 $BCl_3$ 가스유량과 RF 척 파워를 100 W로 고정시켰을 때 식각율은 47 mTorr에서 가장 높았으며, 그 값은 $0.42{\mu}m/min$ 이었다. GaAs의 식각 속도는 공정압력이 증가할수록 감소하였으며 180 mTorr에서는 식각율이 $0.03{\mu}m/min$로 거의 식각되지 않았다. 또한 공정압력을 75 mTorr, RF 척 파워를 100 W로 고정시키고, $BCl_3$ 가스유량을 2.5 sccm에서 10 sccm까지 변화시켰을 때, 10 sccm 의 $BCl_3$ 가스유량에서 가장 높은 식각율인 $0.87{\mu}m/min$이 측정되었다. 압력에 따른 GaAs의 식각 후 표면 거칠기는 최대 2 nm 정도로 비교적 매끈하였으며, 거의 식각되지 않은 180mTorr의 조건에서는 약 1 nm로 낮아졌다. 본 실험 조건에서 GaAs의 감광제에 대한 식각 선택비는 최대 약 3:1 이내였다.

• Journal of the Korean institute of surface engineering
• /
• v.36 no.5
• /
• pp.418-422
• /
• 2003

평판형 유도결합 플라즈마 식각장비(inductively coupled plasma etcher)를 이용하여 각종 공정조건들에 따른 GaAs의 식각특성을 연구하였다. 공정변수들은 ICP 소스파워(0-500 W), RIE 척파워(0-150 W), 가스 종류($BCl_3$, $BCl_3$/Ar, $BCl_3$/Ne) 및 가스혼합비였다. $BCl_3$ 가스만을 이용하여 GaAs를 식각한 경우보다 25%의 Ar이나 Ne같은 불활성 기체를 혼합한 $15BCl_3$/5Ar, $15BCl_3$/5Ne 가스를 이용한 경우의 식각률이 더 우수한 것을 확인하였다. 그리고 50% 이하의 Ar이 혼합된 $BCl_3$/Ar의 경우는 높은 식각률 (＞4,000 $\AA$/min)과 평탄한 표면(RMS roughness : ＜2 nm)을 얻을 수 있었지만 지나친 양(＞50%)의 Ar의 혼합은 오히려 표면을 거칠게 하거나 식각률을 떨어뜨리는 결과를 가져왔다. 그리고 20 sccm $BCl_3$, 100 W RIE 척파워, 300 W ICP 소스파워, 공정압력이 7.5 mTorr인 조건에서의 GaAs의 식각결과는 아주 우수한 특성(식각률: ∼ 4,000, $\AA$/min, 우수한 수직측벽도: ＞$87^{\circ}$, 평탄한 표면: RMS roughness : ∼0.6 nm)을 나타내었다.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.11 no.5
• /
• pp.365-370
• /
• 1998

We studied a electrical properties in GaAs/AlGaAs/InGaAs pseudomorphic high electron mobility transistors(PHEMT s) recessed by electron cyclotron resonance(ECR) plasma and wet etching. Using the $NH_4OH$ solution, a nonvolatile AlF$_3$layer formed on AlGaAs surface after selective gate recess is effectively eliminated. Also, we controlled threshold voltage($V_th$) using $H_3PO_4$ etchant. We have fabricated a device with 540 mS/mm maximum transconductance and -0.2 V threshold voltage by using $NH_4OH$ and $H_3PO_4$dip after ECR gate recessing. In a 2-finger GaAs PHEMT with a gate length of 0.2$\mu m$ and width of 100 $\mu m$, a current gain of 15 dB at 10 GHz and a maximum cutoff frequency of 58.9 GHz have been obtained from the measurement of current gain as a function of frequency at 12mA $I_{dss}$ and 2 V souce-drain voltage.

• Korean Journal of Materials Research
• /
• v.29 no.3
• /
• pp.155-159
• /
• 2019

Surface plasmon resonance is the resonant oscillation of conduction electrons at the interface between negative and positive permittivity material stimulated by incident light. In particular, when light transmits through the metallic microhole structures, it shows an increased intensity of light. Thus, it is used to increase the efficiency of devices such as LEDs, solar cells, and sensors. There are various methods to make micro-hole structures. In this experiment, micro holes are formed using a wet chemical etching method, which is inexpensive and can be mass processed. The shape of the holes depends on crystal facets, temperature, the concentration of the etchant solution, and etching time. We select a GaAs(100) single crystal wafer in this experiment and satisfactory results are obtained under the ratio of etchant solution with $H_2SO_4:H_2O_2:H_2O=1:5:5$. The morphology of micro holes according to the temperature and time is observed using field emission - scanning electron microscopy (FE-SEM). The etching mechanism at the corners and sidewalls is explained through the configuration of atoms.

• Proceedings of the Optical Society of Korea Conference
• /
• 1989.02a
• /
• pp.172-175
• /
• 1989

1.3${\mu}{\textrm}{m}$ surface-emitting GaInAsP/InP LED was fabricated by two-phase supercooling LPE technique. The lattice mismatch of the grown DH wafer was typically 0.03%. The processes involve SiO2 CVD, lithography, Zn diffusion, lift-off, lapping, annealing, and wire bonding. The fabricated LED shows the optical power of 600㎼ at 70mA driving current, differential resistance of 4$\Omega$, the f3dB of 35MHz, and the FWHM of 1040{{{{ ANGSTROM }}. The peak wavelength of the fabricated LED was at 1.29${\mu}{\textrm}{m}$(100mA).

• Journal of the Korea Academia-Industrial cooperation Society
• /
• v.11 no.2
• /
• pp.409-413
• /
• 2010

We fabricated 10 nm-thick cobalt silicide($CoSi_2$) as a buffer layer on a p-type Si(100) substrate to investigate the possibility of GaN epitaxial growth on $CoSi_2/Si(100)$ substrates. We deposited 500 nm-GaN on the cobalt silicide buffer layer at low temperature with a PA-MBE (plasma assisted-molecular beam epitaxy) after the $CoSi_2/Si$ substrates were cleaned by HF solution. An optical microscopy, AFM, TEM, and HR-XRD (high resolution X-ray diffractometer) were employed to determine the GaN epitaxy. For the GaN samples without HF cleaning, they showed no GaN epitaxial growth. For the GaN samples with HF cleaning, they showed $4\;{\mu}m$-thick GaN epitaxial growth due to surface etching of the silicide layers. Through XRD $\omega$-scan of GaN <0002> direction, we confirmed the cyrstallinity of GaN epitaxy is $2.7^{\circ}$ which is comparable with that of sapphire substrate. Our result implied that $CoSi_2/Si(100)$ substrate would be a good buffer and substrate for GaN epitaxial growth.