• Proceedings of the Korean Institute of Intelligent Systems Conference
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• 2002.12a
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• pp.379-382
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• 2002

GA(Genetic Algorithm)는 자연계 진화를 모방한 계산 알고리즘으로서 단순하고 응용이 쉽기 때문에 여러 분야에 사용되고 있다. 하지만 GA의 단점은 일반적인 소프트웨어로 동작시켰을 때는 실행속도가 느리다는 것이다. 특히 chromosome이 길 경우 연속적인 교차, 돌연변이를 수행해야한다. GA Processor(GAP)는 GA를 수행하기위한 전용 Processor로서 GA의 동작을 빨리 수행할 수 있게 한다. 본 논문에서는 pipeline 구조의 GAP를 설계하여 GA를 수행함에 있어 소프트웨어와 하드웨어의 성능을 비교한다.

• Proceedings of the KIEE Conference
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• 1999.07g
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• pp.2827-2829
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• 1999

Genetic algorithms were described as a method of solving large-scaled optimization problems with complex constraints. It has overcome their slowness, a major drawback of genetic algorithms using hardware implementation of genetic algorithm processor (GAP). In this study, we proposed GAP effectively connecting the goodness of survival-based GA, steady-state GA, tournament selection. Using Pipeline Parallel processing, handshaking protocol effectively, the proposed GAP exhibits 50% speed-up over survival-based GA which runs one million crossovers per second(1MHz). It will be used for high speed processing such of central processor of EHW, robot control and many optimization problem.

• The Transactions of the Korean Institute of Electrical Engineers D
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• v.52 no.5
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• pp.295-304
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• 2003

In this paper, we proposed a hardware-oriented Genetic Algorithm Processor(GAP) based on subpopulation architecture for high-performance convergence and reducing computation time. The proposed architecture was applied to enhancing population diversity for correspondence to premature convergence. In addition, the crossover operator selection and linear ranking subpop selection were newly employed for efficient exploration. As stochastic search space selection through linear ranking and suitable genetic operator selection with respect to the convergence state of each subpopulation was used, the elapsed time of searching optimal solution was shortened. In the experiments, the computation speed was increased by over $10\%$ compared to survival-based GA and Modified-tournament GA. Especially, increased by over $20\%$ in the multi-modal function. The proposed Subpop GA processor was implemented on FPGA device APEX EP20K600EBC652-3 of AGENT 2000 design kit.

• Journal of the Korean Institute of Intelligent Systems
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• v.12 no.5
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• pp.462-466
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• 2002

Genetic Algorithm (GA) which imitates the process of nature evolution is applied to various fields because it is simple to theory and easy to application. Recently applying GA to hardware, it is to proceed the research of Evolvable Hardware(EHW) developing the structure of hardware and reconstructing it. And it is growing a necessity of GAP that embodies the computation of GA to the hardware. Evolving by GA don't act in the software but in the hardware(GAP) will be necessary for the design of independent EHW. This paper shows the design GAP for fast reconfiguration of EHW.

• The Transactions of the Korean Institute of Electrical Engineers D
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• v.53 no.4
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• pp.265-276
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• 2004

Genetic Algorithm(GA), that is shown stable performance to find an optimal solution, has been used as a method of solving large-scaled optimization problems with complex constraints in various applications. Since it takes so much time to execute a long computation process for iterative evolution and adaptation. In this paper, a hardware-based adaptive GA was proposed to reduce the serious computation time of the evolutionary process and to improve the accuracy of convergence to optimal solution. The proposed GA, based on steady-state model among continuos generation model, performs an adaptive mutation process with consideration of the evolution flow and the population diversity. The drawback of the GA, premature convergence, was solved by the proposed adaptation. The Performance improvement of convergence accuracy for some kinds of problem and condition reached to 5-100% with equivalent convergence speed to high-speed algorithm. The proposed adaptive GAP(Genetic Algorithm Processor) was implemented on FPGA device Xilinx XCV2000E of EHW board for face recognition.

• The Transactions of the Korean Institute of Electrical Engineers D
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• v.49 no.3
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• pp.133-144
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• 2000

Genetic Algorithm(GA) has been known as a method of solving large-scaled optimization problems with complex constraints in various applications. Since a major drawback of the GA is that it needs a long computation time, the hardware implementations of Genetic Algorithm Processors(GAP) are focused on in recent studies. In this paper, a hardware-oriented GA was proposed in order to save the hardware resources and to reduce the execution time of GAP. Based on steady-state model among continuos generation model, the proposed GA used modified tournament selection, as well as special survival condition, with replaced whenever the offspring's fitness is better than worse-fit parent's. The proposed algorithm shows more than 30% in convergence speed over the conventional algorithm in simulation. Finally, by employing the efficient pipeline parallelization and handshaking protocol in proposed GAP, above 30% of the computation speed-up can be achieved over survival-based GA which runs one million crossovers per second (1㎒), when device speed and size of application are taken into account on prototype. It would be used for high speed processing such of central processor of evolvable hardware, robot control and many optimization problems.

• Proceedings of the IEEK Conference
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• 2001.06c
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• pp.157-160
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• 2001

This paper has been studied a Adaptive Mutation rate Genetic Algorithm Processor. Genetic Algorithm(GA) has some control parameters such as the probability of bit mutation or the probability of crossover. These value give a priori by the designer There exists a wide variety of values for for control parameters and it is difficult to find the best choice of these values in order to optimize the behavior of a particular GA. We proposed a Adaptive mutation rate GA within a steady-state genetic algorithm in order to provide a self-adapting mutation mechanism. In this paper, the proposed a adaptive mutation rate GAP is implemented on the FPGA board with a APEX EP20K600EBC652-3 devices. The proposed a adaptive mutation rate GAP increased the speed of finding optimal solution by about 10%, and increased probability of finding the optimal solution more than the conventional GAP

• Proceedings of the Korean Institute of Intelligent Systems Conference
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• 2002.05a
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• pp.179-182
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• 2002

GA(Genetic Algorithm)는 자연계 진화를 모방한 계산 알고리즘으로서 단순하고 응용이 쉽기 때문에 여러 분야에 전역적 최적해 탐색에 많이 사용되고 있다. 최근에는 하드웨어를 구성하는 방법의 하나로서 사용되어 진화하드웨어라는 분야를 탄생시켰다. 이와 함께 GA의 연산자체를 하드웨어로 구현하는 GA processor(GAP)의 필요성도 증가하고 있다. 특히 진화하드웨어를 소프트웨어상에서 진화 시키는 것이 아닌 GAP에 의해 진화 시키는 것은 독립된 구조의 진정한 EHW 설계에 필수적이 될 것이다. 본 논문에서는 GAP 설계 방법을 제안하고 이를 이용하여 진화하드웨어로 State machine을 구현하고자 한다. State machine의 경우 구조상 피드백이 필요하기 때문에 가산기나 멀티플렉서보다는 훨씬 복잡하고 설계가 까다로운 구조이다. 제안된 방법을 통하여 명시적 설계가 어려운 하드웨어 설계에 GAP를 이용한 하드웨어의 진화에 적용함으로써 그 유용성을 보인다.

• Proceedings of the KIEE Conference
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• 2003.11c
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• pp.376-379
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• 2003

DNA computing based DNA sequence Is operated through the biology experiment. Biology experiment used as operator causes illegal reactions through shifted hybridization, mismatched hybridization, undesired hybridization of the DNA sequence. So, it is essential to design DNA sequence to minimize the potential errors. This paper proposes method of the DNA sequence generation based evolutionary operation processor. Genetic algorithm was used for evolutionary operation and extra hardware, namely genetic algorithm processor was implemented for solving repeated evolutionary process that causes much computation time. To show efficiency of the Proposed processor, excellent result is confirmed by comparing between fitness of the DNA sequence formed randomly and DNA sequence formed by genetic algorithm processor. Proposed genetic algorithm processor can reduce the time and expense for preparing DNA sequence that is essential in DNA computing. Also it can apply design of the oligomer for development of the DNA chip or oligo chip.

• Journal of the Korean Institute of Intelligent Systems
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• v.15 no.2
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• pp.224-229
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• 2005

Generally, genetic algorithm (GA) has too much time and space complexity when it is running in the typical processor. Therefore, we are forced to use the high-performance and expensive processor by this reason. It also works as a barrier to implement real device, such a small mobile robot, which is required only simple rules. To solve this problem, this paper presents and proposes enhanced processor-architecture for the faster GA processing. A typical processor architecture can be enhanced and specialized by two approaches: one is a sorting network, the other is a residue number system (RNS). A sorting network can improve the time complexity of which needs to compare the populations' fitness. An RNS can reduce the magnitude of the largest bit that dictates the speed of arithmetic operation. Consequently, it can make the total logic size smaller and innovate arithmetic operation speed faster.