• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.27 no.8
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• pp.510-515
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• 2014

Thin films of cubic $Na_{0.6}WO_3$, which is one of the sodium tungsten bronze, were fabricated by rf sputtering for the electrode applications in integrated sensors and actuators. A single-phase cubic $Na_{0.6}WO_3$ sputtering target of power type was prepared by conventional solid-state reaction. Thin films were deposited from the powder target, and the as-deposited films were amorphous, thus they annealed by tube furnace or RTP for crystallization. Thin films having cubic phase $Na_xWO_3$ were fabricated by the optimization of sputtering and post-annealing conditions, but single-phase cubic $Na_{0.6}WO_3$ thin films were not obtained. Although the films were not in single phase, they had good electrical conduction properties showing electrical resistivities of $10-4{\Omega}{\cdot}cm$ order.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2006.06a
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• pp.376-377
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• 2006

This paper presents the characteristics of Ta-N thin film strain gauges that are suitable for harsh environemts, which were deposited on thermally oxidized Si substrates by DC reactive magnetronsputtering in an argon-nitrogen atmosphere (Ar-$N_2$ (4 ~ 16 %)). These films were annealed for 1 hr in $2{\times}10^{-6}$ Torr in a vacuum furnace with temperatures that ranged from 500 - $1000^{\circ}C$. The optimized deposition and annealing conditions of the Ta-N thin film strain gauges were determined using 8 % $N_2$ gas flow ratio and annealing at $900^{\circ}C$ for 1 hr. Under optimum formation conditions, the Ta-N thin film strain gauges obtained a high electrical resistivity, ${\rho}\;=\;768.93\;{\mu}{\Omega}{\cdot}cm$, a low temperature coefficient of resistance, $TCR\;=\;-84\;ppm/^{\circ}C$ and a high temporal stability with a good longitudinal gauge factor, GF=4.12. The fabricated Ta-N thin film strain gauges are expected to be used inmicromachined pressure sensors and load cells that are operable under harsh environments.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2005.05a
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• pp.76-79
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• 2005

$Nd:YVO_4$ 연속발진 레이저(CW laser:Continuous wave laser)로 제작한 다결정 실리콘 박막의 이온도핑 효과를 조사하였다. PECVD로 증착한 비정질 실리콘 박막을 CW 레이저를 조사하여 결정화한 후 $B_2H_6$ 플라즈마 이온 도즈량을 변화시켜 이온 도핑을 하고 급속열처리 방법과 퍼니스 어닐링 방법으로 도펀트 활성화를 하였다. 이온 도핑된 CW 다결정 실리콘 박막의 이온 도즈량에 따른 판저항 변화를 비교하고, 급속열처리(RTA: Rapid Thermal Annealing)와 퍼니스 어닐링(FA: Furnace Annealing) 전후의 결정성 변화를 라만 스펙트럼(Raman spectrum) 을 통하여 분석하였다. 이온 도즈량이 증가함에 따라 판저항은 감소하고, 어닐링 후 이온 도핑에 의해 손상된 박막이 복원됨을 확인 할 수 있다.

• Korean Journal of Materials Research
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• v.31 no.12
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• pp.727-731
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• 2021

In this study, we have investigated a selective emitter using a UV laser on BBr₃ diffusion doping layer. The selective emitter has two regions of high and low doping concentration alternatively and this structure can remove the disadvantages of homogeneous emitter doping. The selective emitters were fabricated by using UV laser of 355 nm on the homogeneous emitters which were formed on n-type Si by BBr₃ diffusion in the furnace and the heavy boron doping regions were formed on the laser regions. In the optimized laser doping process, we are able to achieve a highly concentrated emitter with a surface resistance of up to 43 Ω/□ from 105 ± 6 Ω/□ borosilicate glass (BSG) layer on Si. In order to compare the characteristics and confirm the passivation effect, the annealing is performed after Al₂O₃ deposition using an ALD. After the annealing, the selective emitter shows a better effect than the high concentration doped emitter and a level equivalent to that of the low concentration doped emitter.

• Proceedings of the Korean Vacuum Society Conference
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• 2015.08a
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• pp.208.1-208.1
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• 2015

최근, 차세대 투명 디스플레이 구동소자로서 산화물 반도체를 이용한 Transparent Amorphous Oxide Semiconductor (TAOS) 기술이 큰 주목을 받고 있다. 산화물 반도체는 기존의 a-Si에 비해 우수한 전기적인 특성과 낮은 구동전압 그리고 넓은 밴드 갭으로 인한 투명성의 장점들이 있다. 그리고 낮은 공정 온도에서도 제작이 가능하기 때문에 유리나 플라스틱과 같은 다양한 기판에서도 박막 증착이 가능하다. 하지만 기존의 furnace를 이용한 열처리 방식은 낮은 온도에서 우수한 전기적인 특성을 내기 어려우며, 공정 시간이 길어지는 단점들이 있다. 따라서 본 연구에서는 산화물 반도체중 In-Ga-Zn-O (IGZO)와 In-Sn-O(ITO)를 각각 채널 층과 게이트 전극으로 이용하였다. 또한 마이크로웨이브 열처리 기술을 이용하여 기존의 열처리 방식에 비해 에너지 전달 효율이 높고 짧은 시간동안 저온 공정이 가능하며 우수한 전기적인 특성을 가지는 투명 박막 트랜지스터를 구현 하였다. 본 실험은 glass 기판위에서 진행되었으며, RF sputter를 이용하여 ITO를 150 nm 증착한 후, photo-lithography 공정을 통하여 하부 게이트 전극을 형성하였다. 이후에 RF sputter를 이용하여 SiO2 와 IGZO 를 각각 300, 50 nm 증착하였고, patterning 과정을 통하여 채널 영역을 형성하였다. 또한 소자의 전기적인 특성 향상을 위해 마이크로웨이브 열처리를 1000 Watt로 2 분간 진행 하였고, 비교를 위하여 기존 방식인 furnace 를 이용하여 N2 분위기에서 $400^{\circ}C$로 30분간 진행한 소자도 병행하였다. 그 결과 마이크로웨이브를 통해 열처리한 소자는 공정 온도가 $100^{\circ}C$ 이하로 낮기 때문에 glass 기판에 영향을 주지 않고 기존 furnace 열처리 한 소자보다 전체적으로 전기적인 특성이 우수한 것을 확인 하였다.

• Corrosion Science and Technology
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• v.8 no.6
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• pp.217-222
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• 2009

The production of advanced high strength steels requires the improvement of cooling technology. The use of high cooling rates allows relatively low levels of expensive alloying additions to ensure sufficient hardenability. In classical annealing and hot-dip galvanizing lines a mixing station is used to provide atmosphere gas containing 3-5% hydrogen and 97-95% nitrogen in the various sections of the furnace, including the rapid cooling section. Heat exchange enhancement in this cooling section can be insured by the increased hydrogen concentration. Drever International developed a patented improvement of cooling technology based on the following features: pure hydrogen gas is injected only in the rapid cooling section whereas the different sections of the furnace are supplied with pure nitrogen gas; the control of flows through atmosphere gas management allows to get high hydrogen concentration in cooling section and low hydrogen content in the other furnace zones. This cooling technology development insures higher cooling rates without additional expensive hydrogen gas consumption and without the use of complex sealing equipments between zones. In addition reduction in electrical energy consumption is obtained. This atmosphere control development can be combined with geometrical design improvements in order to get optimised cooling technology providing high cooling rates as well as reduced strip vibration amplitudes. Extensive validation of theoretical research has been conducted on industrial lines. New lines as well as existing lines, with limited modifications, can be equipped with this new development. Up to now this technology has successfully been implemented on 6 existing and 7 new lines in Europe and Asia.

• Journal of the Korean Vacuum Society
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• v.12 no.3
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• pp.168-173
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• 2003

Recently, according to the rapid progress in Flat-panel-display industry, there has been a growing interest in the poly-Si process. Compared with a-Si, poly-Si offers significantly high carrier mobility, so it has many advantages to high response rate in Thin Film Transistors (TFT's). We have investigated a new process for the high temperature Solid Phase Crystallization (SPC) of a-Si films without any damages on glass substrates using thin film heater. because the thin film heater annealing method is a very rapid thermal process, it has very low thermal budget compared to the conventional furnace annealing. therefore it has some characteristics such as selective area crystallization, high temperature annealing using glass substrates. A 500 $\AA$-thick a-Si film was crystallized by the heat transferred from the resistively heated thin film heaters through $SiO_2$ intermediate layer. a 1000 $\AA$-thick $TiSi_2$ thin film confined to have 15 $\textrm{mm}^{-1}$ length and various line width from 200 to 400 $\mu\textrm{m}$ was used as the thin film heater. By this method, we successfully crystallized 500 $\AA$-thick a-Si thin films at a high temperature estimated above $850^{\circ}C$ in a few seconds without any thermal deformation of g1ass substrates. These surprising results were due to the very small thermal budget of the thin film heaters and rapid thermal behavior such as fast heating and cooling. Moreover, we investigated the time dependency of the SPC of a-Si films by observing the crystallization phenomena at every 20 seconds during annealing process. We suggests the individual managements of nucleation and grain growth steps of poly-Si in SPC of a-Si with the precise control of annealing temperature. In conclusion, we show the SPC of a-Si by the thin film heaters and many advantages of the thin film heater annealing over other processes

• Korean Journal of Materials Research
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• v.10 no.10
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• pp.665-670
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• 2000

Linear annealing method was developed to increase the bond strength of Si wafer pair mated at room tem­perature instead of conventional furnace annealing method. It has been known that the interval of the two mating wafer surfaces decreases and the density of gaseous phases generated at the interface increases with increase in an-nealing temperature. The new annealing method consisting of one heat source and light reflecting mirror used these two phenomena and was applied to Si$\mid$$\mid$Si and Si$\mid$$\mid$$SiO_2/Si$ bonding. The bonding interface observed directly by using IR camera and HRTEM showed clear bonding interface without any unbonded areas except the area generated by the dusts inserted into the mating interface at the room temperature. Crack opening method and direct tensile test was ap­pplied to measure the bond strength. The two methods showed similar results. The bond strength increased continuous­tly with the increase of annealing temperature.

• 한국신재생에너지학회:학술대회논문집
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• 2010.06a
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• pp.98.2-98.2
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• 2010

$CuInS_2$ thin films were synthesized by sulfurization of Cu/In Stacked elemental layer deposited onto glass Substrates by vacuum furnace annealing at temperature 200[$^{\circ}C$]. And structural and electrical properties were measured in order to certify optimum conditions for growth of the ternary compound semiconductor $CuInS_2$ thin films with non-stoichiometry composition. $CuInS_2$ thin film was well made at the heat treatment 200[$^{\circ}C$] of SLG/Cu/In/S stacked elemental layer which was prepared by thermal evaporator, and chemical composition of the thin film was analyzed nearly as the proportion of 1 : 1 : 2. Physical properties of the thin film were investigated at various fabrication conditions substrate temperature, annealing and temperature, annealing time by XRD, FE-SEM and hall measurement system. At the same time, carrier concentration, hall mobility and resistivity of the thin films was $9.10568{\times}10^{17}$ [$cm^{-3}$], 312.502 [$cm^2/V{\cdot}s$] and $2.36{\times}10^{-2}$ [${\Omega}{\cdot}cm$], respectively.

• Proceedings of the Korean Vacuum Society Conference
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• 1999.07a
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• pp.91-91
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• 1999

광소자 기술은 정보 전달 및 저장 기술의 지속적인 증가 요구에 따라 발전을 거듭하여 왔다. 특히 광통신 및 저장 기술에서 광원으로 사용되는 레이저 다이오드는 안정되면서 쉽게 제작할 수 있어야 한다. 이온 주입 방법은 반도체 공정에서 광범위하게 사용되는 공정이며 이미 소자측면에서 안정성이 확보되었다고 볼 수 있으나 대부분 메모리 등의 실리콘 반도체에서 이용되어 왔다. 최근에는 화합물 반도체 분야에서도 적용하는 예가 증가되고 있으나 광원으로 사용되는 레이저 다이오드의 경우는 우수한 품질의 반도체 층이 요구되며 따라서 damage가 큰 이온 주입 방법을 이용한 연구는 아직 많이 이루어져 있지 않다. 본 연구에서는 레이저 다이오드 구조의 성장측에 국부적으로 Fe 이온을 주입하여 도파로를 형성하여 광을 구속하여 도파시키는 동시에 전기적으로도 도파로 부분으로만 다이오드가 형성되도록 하고자 한다. 먼저 p층의 전기적 절연에 필요한 조건을 확보하기 위하여 CBE를 사용하여 Fe가 doping 된 SI-InP wafer 위에 p-InP (Be:5x1017 cm-3)층을 1.2$mu extrm{m}$ 성장한 후 ohmic 층으로 p-InGaAs (Be:1x1019 cm-3)을 0.1$\mu\textrm{m}$ 성장한 시료에 고에너지 이온 주입 장치를 사용하여 Fe 이온을 1MeV, 1.6meV의 에너지에 각각 1x1014cm-2, 2x1014cm-2 의 dose로 전면에 implant 하였다. 이 시료를 tube furnace에서 500, 600, $700^{\circ}C$각각 10분씩 annealing 한 후 재성장을 확인하기 위하여 DCXRD을 측정하였다. 그림 1은 DCXRD rocking curve로 annealing 하기 전 후의 In rich에서 side peak의 감소를 확인 할 수 있었는데 이는 damage가 어느 정도 복구되었음을 의미한다. 또한 절연 특성을 확인하기 위하여 ohmic metal을 증착하여 Hall 효과를 측정하였다. 그림 2에 보이는 것과 같이 annealing 온도가 증가함에 따라 면저항이 크게 증가함을 볼 수 있으며 이온 주입하기 전의 시료에 비해 104 이상의 저항을 갖을 수 있다. 향후 이러한 결과를 바탕으로 1.55$\mu\textrm{m}$ LD 구조에서 발진 특성을 관찰할 계획이다.