• Title/Summary/Keyword: Frequency locking

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Harmonic mode locking of 'Figure-of-Eight' fiber soliton laser using regenerative phase modulation (재생형 위상 변조에 의한 '8'자 구조 광섬유 솔리톤 레이저의 고차 조화 모드록킹)

  • 윤승철;박희갑
    • Korean Journal of Optics and Photonics
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    • v.10 no.2
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    • pp.146-151
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    • 1999
  • We demonstrated a harmonic mode locking scheme that used regeneratie phase modulation to get a high and stable repetition rate in a figure-of-eight fiber soliton laser. From the detected beat spectra of the laser output, a sinusoidal clock freguency tone of 400 MHz, the 96th harmonics of the fundamental mode locking frequency, was extracted with a high Q filter and was used to drive the phase modulator, resulting in stable output of soliton pulse train synchronized with the modulation signal. Generated soliton pulses had FWHM pulsewidth of 930 fs and 3.1 nm linewidth, yielding pulsewidth-bandwidth product of 0.359 that was close to the transform limit. As the modulation frequency always followed the beat frequency of laser modes, stable harmonic mode locking was achieved without the adjustment of the cavity length, which has been commonly required in actively mode-locked lasers.

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A DLL-Based Frequency Synthesizer for Generation of Various Clocks (가변 클록 발생을 위한 DLL 주파수 합성기)

  • 이지현;송윤귀;최영식;최혁환;류지구
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.8 no.6
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    • pp.1153-1157
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    • 2004
  • This paper describes a new programmable DLL_based frequency synthesizer. Generally, PLLs have been used for frequency synthesis. Inherent fast locking DLLs are also used for frequency synthesis. However, DLL needs a frequency multiplier for various frequencies. A conventional frequency multiplier used in DLL has a restriction in which a multiple is fixed. However, the proposed DLL can generate clocks which are from 6 times to 10 times of the reference clock. Frequency range of the proposed DLL is from 600MHz to 1GHz. The idea has been confirmed by HSPICE simulations in a $0.35-\mu\textrm{m}$ CMOS process.

Characterization of carrier-envelope-offset frequency of a femtosecond laser stabilized by the direct CEP locking method

  • Luu, Tran Trung;Lee, Jae-Hwan;Kim, Eok-Bong;Park, Chang--Yong;Yu, Tae-Jun;Nam, Chang-Hee
    • Proceedings of the Optical Society of Korea Conference
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    • 2009.10a
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    • pp.241-242
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    • 2009
  • Characterics of carrier-envelope-offset frequency ($f_{ceo}$) of a femtosecond laser stabilized by the direct locking method were investigated using two f-to-2f interferometers. The stability of $f_{ceo}$ was comaparable to that achieved with a conventional PLL method.

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A Fast-Locking All-Digital Frequency Multiplier (고속-락킹 디지털 주파수 증배기)

  • Lee, Chang-Jun;Kim, Jong-Sun
    • Journal of IKEEE
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    • v.22 no.4
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    • pp.1158-1162
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    • 2018
  • A fast-lock multiplying delay-locked loop (MDLL)-based digital clock frequency multiplier with an anti-harmonic lock capability is presented. The proposed digital frequency multiplier utilizes a new most-significant bit (MSB)-interval search algorithm to achieve fast-locking time without harmonic lock problems. The proposed digital MDLL frequency multiplier is designed in a 65nm CMOS process, and the operating output frequency range is from 1 GHz to 3 GHz. The digital MDLL provides a programmable fractional-ratio frequency multiplication ratios of N/M, where N = 1, 4, 5, 8, 10 and M = 1, 2, 3, respectively. The proposed MDLL consumes 3.52 mW at 1GHz and achieves a peak-to-peak (p-p) output clock jitter of 14.07 ps.

Locking horizontal mattress suture as the alternative closure method for scalp lacerations difficult to suture with staple (두피 봉합기로 봉합하기 어려운 두피 열상에 시행한 잠금 수평 매트리스 봉합법의 유용성 관찰 연구)

  • Sah, Seung Woo;Seol, Seunghwan;Lee, Woon Jeong;Woo, Seon Hee;Kim, Dae Hee;Lee, June Young;In, Sangkook;Kim, Bonggyeom
    • Journal of The Korean Society of Emergency Medicine
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    • v.29 no.6
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    • pp.649-655
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    • 2018
  • Objective: This paper reports the possibility of using of a locking horizontal mattress suture technique in repairing lacerations that are difficult to suture with staples. Methods: Data were collected retrospectively over a 6-month period regarding the routine repair of scalp lacerations: those in areas injured by a high energy blunt mechanism, continued to bleed after pressure, nonlinear or damaged skin repaired with a locking horizontal mattress technique, and simple interrupted technique. The effects of the two techniques used to repair scalp lacerations on wound healing, complication rate, and patient satisfaction were examined. The categorical variables are expressed as the number and percent. A Mann-Whitney-Wilcoxon test was used for statistical analysis. A P-value less than 0.05 was considered significant. Results: Thirty-seven consecutive patients with scalp lacerations presented for care. Wound closure was accomplished with the locking horizontal mattress sutures in 40.5% (n=15) (median length, 5.0 cm; interquartile range [IQR], 4.0-7.0 cm). Simple interrupted sutures (median length, 4 cm; IQR, 3.0-5.0 cm) were used in 59.5% (n=22) (P=0.015). The frequency of additional bandage compression (P=0.008), frequency of exudative hemorrhage (P=0.018), and suture mark frequency at suture removal (P=0.047) were significantly lower in the locking horizontal mattress group. Conclusion: The locking horizontal mattress suture, which has the advantage of a horizontal mattress suture, may be one of the ways that can be used alternatively to treat scalp lacerations that difficult to suture with staples.

A Novel Fast Open-loop Phase Locking Scheme Based on Synchronous Reference Frame for Three-phase Non-ideal Power Grids

  • Xiong, Liansong;Zhuo, Fang;Wang, Feng;Liu, Xiaokang;Zhu, Minghua;Yi, Hao
    • Journal of Power Electronics
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    • v.16 no.4
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    • pp.1513-1525
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    • 2016
  • Rapid and accurate phase synchronization is critical for the reliable control of grid-tied inverters. However, the commonly used software phase-locked loop methods do not always satisfy the need for high-speed and accurate phase synchronization under severe grid imbalance conditions. To address this problem, this study develops a novel open-loop phase locking scheme based on a synchronous reference frame. The proposed scheme is characterized by remarkable response speed, high accuracy, and easy implementation. It comprises three functional cascaded blocks: fast orthogonal signal generation block, fast fundamental-frequency positive sequence component construction block, and fast phase calculation block. The developed virtual orthogonal signal generation method in the first block, which is characterized by noise immunity and high accuracy, can effectively avoid approximation errors and noise amplification in a wide range of sampling frequencies. In the second block, which is the foundation for achieving fast phase synchronization within 3 ms, the fundamental-frequency positive sequence components of unsymmetrical grid voltages can be achieved with the developed orthogonal signal construction strategy and the symmetrical component method. The real-time grid phase can be consequently obtained in the third block, which is free from self-tuning closed-loop control and thus improves the dynamic performance of the proposed scheme. The proposed scheme is adaptive to severe unsymmetrical grid voltages with sudden changes in magnitude, phase, and/or frequency. Moreover, this scheme is able to eliminate phase errors induced by harmonics and random noise. The validity and utility of the proposed scheme are verified by the experimental results.

Characteristics of two Extended-Cavity Diode Lasers phase locked with 9.2 GHz frequency offset (9.2 GHz 주파수 차ol로 Phase Locking된 두 다이오드 레이저의 특성 조사)

  • In, Min-Kyo;Park, Yeon-Soo;Cho, Hyuk;Shin, Eun-Ju;Kwon, Taek-Yong;Yoo, Dae-Hyuk;Lee, Ho-Sung;Park, Sang-Eon
    • Proceedings of the Optical Society of Korea Conference
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    • 2002.07a
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    • pp.68-69
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    • 2002
  • 두 대의 결맞은 레이저는 원자의 고분해 분광이나 광통신 등의 여러 분야에서 응용이 가능하다. 본 연구에서는 세슘 원자분수 주파수표준기와 저속 원자빔 주파수표준기에서 원자의 속도 선택 실험에 사용하기 위한 9.2 GHz의 주파수 차이를 가지는 두 대의 결맞은 레이저를 제작하였다. 결맞은 레이저는 주입 잠금(injection locking)이나 위상 잠금 회로(phase locking loop)를 이용하여 만들 수 있다. (중략)

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A Wide Range PLL for 64X CD-ROMs & l0X DVD-ROMs (64배속 CD-ROM 및 10배속 DVD-ROM용 광대역 위상 고정 루프)

  • 진우강;이재신;최동명;이건상;김석기
    • Proceedings of the IEEK Conference
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    • 1999.11a
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    • pp.340-343
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    • 1999
  • In this paper, we propose a wide range PLL(Phase Locked Loop) for 64X CD-ROMs & l0X DVD-ROMs. The frequency locking range of the Proposed PLL is 75MHz~370MHz. To reduce jitters caused by large VCO gain and supply voltage noise, a new V-I converter and a differential delay cell are used in 3-stage ring VCO, respectively. The new V-I converter has a 0.6V ~ 2.5V wide input range. In addition, we propose a new charge pump which has perfect current matching characteristics for the sourcing/sinking current. This new charge pump improves the locking time and the locking range of the PLL. This Chip is implemented in 0.25${\mu}{\textrm}{m}$ CMOS process. It consumes 55㎽ in worst case with a single 2.5V power supply.

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