• Investigative Magnetic Resonance Imaging
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• v.13 no.1
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• pp.31-39
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• 2009

Purpose : This study proposes the keyhole method in order to improve the time resolution of the proton resonance frequency(PRF) MR temperature monitoring technique. The values of Root Mean Square (RMS) error of measured temperature value and Signal-to-Noise Ratio(SNR) obtained from the keyhole and full phase encoded temperature images were compared. Materials and Methods : The PRF method combined with GRE sequence was used to get MR temperature images using a clinical 1.5T MR scanner. It was conducted on the tissue-mimic 2% agarose gel phantom and swine's hock tissue. A MR compatible coaxial slot antenna driven by microwave power generator at 2.45GHz was used to heat the object in the magnetic bore for 5 minutes followed by a sequential acquisition of MR raw data during 10 minutes of cooling period. The acquired raw data were transferred to PC after then the keyhole images were reconstructed by taking the central part of K-space data with 128, 64, 32 and 16 phase encoding lines while the remaining peripheral parts were taken from the 1st reference raw data. The RMS errors were compared with the 256 full encoded self-reference temperature image while the SNR values were compared with the zero filling images. Results : As phase encoding number at the center part on the keyhole temperature images decreased to 128, 64, 32 and 16, the RMS errors of the measured temperature increased to 0.538, 0.712, 0.768 and 0.845$^{\circ}C$, meanwhile SNR values were maintained as the phase encoding number of keyhole part is reduced. Conclusion : This study shows that the keyhole technique is successfully applied to temperature monitoring procedure to increases the temporal resolution by standardizing the matrix size, thus maintained the SNR values. In future, it is expected to implement the MR real time thermal imaging using keyhole method which is able to reduce the scan time with minimal thermal variations.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.47 no.2
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• pp.21-31
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• 2010

This paper presents a design of PLL and SSCG for reducing the EMI effect at the electronic machinery and tools for DisplayPort application. This system is composed of the essential element of PLL and Charge-Pump2 and Reference Clock Divider to implement the SSCG operation. In this paper, 270MHz/162MHz dual-mode PLL that can provide 10-phase and 1.35GHz/810MHz PLL that can reduce the jitter are designed for 2.7Gbps/162Gbps DisplayPort application. The jitter can be reduced drastically by combining 270MHz/162MHz PLL with 2-stage 5 to 1 serializer and 1.35GHz PLL with 2 to 1 serializer. This paper propose the frequency divider topology which can share the divider between modes and guarantee the 50% duty ratio. And, the output current mismatch can be reduced by using the proposed charge-pump topology. It is implemented using 0.13 um CMOS process and die areas of 270MHz/162MHz PLL and 1.35GHz/810MHz PLL are $650um\;{\times}\;500um$ and $600um\;{\times}\;500um$, respectively. The VCO tuning range of 270 MHz/162 MHz PLL is 330 MHz and the phase noise is -114 dBc/Hz at 1 MHz offset. The measured SSCG down spread amplitude is 0.5% and modulation frequency is 31kHz. The total power consumption is 48mW.

• Journal of IKEEE
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• v.25 no.1
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• pp.156-167
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• 2021

In this paper, we propose a digital transceiver unit design for in-building of 5G optical repeaters that extends the coverage of 5G mobile communication network services and connects to a stable wireless network in a building. The digital transceiver unit for driving the proposed 5G optical repeater is composed of 4 blocks: a signal processing unit, an RF transceiver unit, an optical input/output unit, and a clock generation unit. The signal processing unit plays an important role, such as a combination of a basic operation of the CPRI interface, a 4-channel antenna signal, and response to external control commands. It also transmits and receives high-quality IQ data through the JESD204B interface. CFR and DPD blocks operate to protect the power amplifier. The RF transmitter/receiver converts the RF signal received from the antenna to AD, is transmitted to the signal processing unit through the JESD204B interface, and DA converts the digital signal transmitted from the signal processing unit to the JESD204B interface and transmits the RF signal to the antenna. The optical input/output unit converts an electric signal into an optical signal and transmits it, and converts the optical signal into an electric signal and receives it. The clock generator suppresses jitter of the synchronous clock supplied from the CPRI interface of the optical input/output unit, and supplies a stable synchronous clock to the signal processing unit and the RF transceiver. Before CPRI connection, a local clock is supplied to operate in a CPRI connection ready state. XCZU9CG-2FFVC900I of Xilinx's MPSoC series was used to evaluate the accuracy of the digital transceiver unit for driving the 5G optical repeater proposed in this paper, and Vivado 2018.3 was used as the design tool. The 5G optical repeater digital transceiver unit proposed in this paper converts the 5G RF signal input to the ADC into digital and transmits it to the JIG through CPRI and outputs the downlink data signal received from the JIG through the CPRI to the DAC. And evaluated the performance. The experimental results showed that flatness, Return Loss, Channel Power, ACLR, EVM, Frequency Error, etc. exceeded the target set value.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.3
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• pp.60-68
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• 2009

This work proposes a 10b 200MS/s 65nm CMOS ADC for high-definition video systems such as HDTV requiring high resolution and fast operating speed simultaneously. The proposed ADC employs a four-step pipeline architecture to minimize power consumption and chip area. The input SHA based on four capacitors reduces the output signal range from $1.4V_{p-p}$ to $1.0V_{p-p}$ considering high input signal levels at a low supply voltage of 1.2V. The proposed three-stage amplifiers in the input SHA and MDAC1 overcome the low output resistance problem as commonly observed in a 65nm CMOS process. The proposed multipath frequency-compensation technique enables the conventional RNMC based three-stage amplifiers to achieve a stable operation at a high sampling rate of 200MS/s. The conventional switched-bias power-reduction technique in the sub-ranging flash ADCs further reduces power consumption while the reference generator integrated on chip with optional off-chip reference voltages allows versatile system a locations. The prototype ADC in a 65nm CMOS technology demonstrates a measured DNL and INL within 0.19LSB and 0.61LSB, respectively. The ADC shows a maximum SNDR of 54.BdB and 52.4dB and a maximum SFDR of 72.9dB and 64.8dB at 150MS/S and 200MS/s, respectively. The proposed ADC occupies an active die area of $0.76mm^2$ and consumes 75.6mW at a 1.2V supply voltage.

• Restorative Dentistry and Endodontics
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• v.34 no.5
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• pp.450-459
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• 2009

The aim of this study was to measure the initial dynamic modulus changes of light cured composites using a custom made rheometer. The custom made rheometer consisted of 3 parts: (1) a measurement unit of parallel plates made of glass rods, (2) an oscillating shear strain generator with a DC motor and a crank mechanism, (3) a stress measurement device using an electromagnetic torque sensor. This instrument could measure a maximum torque of 2Ncm, and the switch of the light-curing unit was synchronized with the rheometer. Six commercial composite resins [Z-100 (Z1), Z-250 (Z2), Z-350 (Z3), DenFil (DF), Tetric Ceram (TC), and Clearfil AP-X (CF)] were investigated. A dynamic oscillating shear test was undertaken with the rheometer. A certain volume ($14.2\;mm^3$) of composite was loaded between the parallel plates, which were made of glass rods (3 mm in diameter). An oscillating shear strain with a frequency of 6 Hz and amplitude of 0.00579 rad was applied to the specimen and the resultant stress was measured. Data acquisition started simultaneously with light curing, and the changes in visco-elasticity of composites were recorded for 10 seconds. The measurements were repeated 5 times for each composite at $25{\pm}0.5^{\circ}C$. Complex shear modulus G*, storage shear modulus G', loss shear modulus G" were calculated from the measured strain-stress curves. Time to reach the complex modulus G* of 10 MPa was determined. The G* and time to reach the G* of 10 MPa of composites were analyzed with One-way ANOVA and Tukey's test ($\alpha$ = 0.05). The results were as follows. 1. The custom made rheometer in this study reliably measured the initial visco-elastic modulus changes of composites during 10 seconds of light curing. 2. In all composites, the development of complex shear modulus G* had a latent period for $1{\sim}2$ seconds immediately after the start of light curing, and then increased rapidly during 10 seconds. 3. In all composites, the storage shear modulus G" increased steeper than the loss shear modulus G" during 10 seconds of light curing. 4. The complex shear modulus of Z1 was the highest, followed by CF, Z2, Z3, TC and DF the lowest. 5. Z1 was the fastest and DF was the slowest in the time to reach the complex shear modulus of 10 MPa.