• Korean Journal of Materials Research
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• v.2 no.4
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• pp.285-292
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• 1992

Ultrathin(8nm) oxynitride (SiOxNy) film have been formed on Si(100) by rapid thermal processing(RTP) in $O_2$and $N_2$O as reactants. Compared with conventional furnace $O_2$ oxide, the oxynitride dielectrics shows better characteristics of I-V and TDDB, and less flat-band voltage shift. The oxynitride has a behavior of Fowler-Nordheim tunneling in the region of V 〉${\varphi}_0$ simialr to pure Si$O_2$oxide. The relative dielectric constant of oxynitride is higher than that of conventional pure oxide. Excellent diffusion harrier property to dopant(B$F_2$) is also observed. Nitrogen depth profiles by SIMS, AES, and XPS show nitrogen pile - up at Si$O_2$/Si interface, which can explain the improved properties of oxynitride dielectrics.

• Journal of the Korean Institute of Telematics and Electronics D
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• v.36D no.3
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• pp.34-40
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• 1999

Recently, the gate oxide damage induced by the plasma processes has been one of the most significant reliability issues as the gate oxide thickness falls below 10 nm. The plasma-induced damage was studied with the metal antenna test structures. In addition to the electron trapping, the hole trapping in a 10 nm thick gate oxide due to the plasma-induced charging was observed in the NMOS's with a metal antenna. The hole trapping caused the transconductance (gm) to be reduced like the case of the electron trapping, but to the extent much less than the electron trapping. It would be because the electrical stress that the plasma-induced charging forced to the gate oxide for the devices with the hole trapping was much smaller than for those with the electron trapping. This hypothesis was strongly supported by the measured characteristics of the Fowler-Nordheim current in the gate oxide.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.49 no.1
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• pp.1-7
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• 2000

The SNOSFET memory devices with ultrathin ONO(tunnel oxide-nitride-blocking oxide) gate dielectric were fabricated using n-well CMOS process and investigated its characteristics. The thicknesses of tunnel oxide, nitride and blocking oxide were $23{\AA},\; 53{\AA}\; and\; 33{\AA}$, respectively. Auger analysis shows that the ONO layer is made up of $SiO_2(upper layer of blocking oxide)/O-rich\; SiO_x\N\_y$. It clearly shows that the converting layer with $SiO_x\N\_y(lower layer of blocking oxide)/N-rich SiO_x\N\_y(nitride)/O-rich SiO_x\N\_y(tunnel oxide)$. It clearly shows that the converting layer with $SiO_x\N\_y$ phase exists near the interface between the blocking oxide and nitride. The programming condition of +8 V, 20 ms, -8 V, 50 ms is determined and data retention over 10 years is obtained. Under the condition of 8 V programming, it was confirmed that the modified Fowler-Nordheim tunneling id dominant charge transport mechanism. The programmed threshold voltage is distributed less than 0.1 V so that the reading error of memory stated can be minimized. An $8\times8$ NAND type flash EEPROM with SONOSFET memory cell was designed and simulated with the extracted SPICE parameters. The sufficient read cell current was obtained and the upper limit of $V_{TH}$ for write state was over 2V.

• Journal of the Korean Vacuum Society
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• v.9 no.2
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• pp.122-129
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• 2000

Field emission behavior from vitreous carbon powders deposited on Mo coated glass by electro-phoretic method was investigated. Although the vitreous carbon has only $sp^2$ hybridized carbon bond, we could observe an excellent field emission behavior. Reproducible electron emission was observed without initiation process which is known to be needed in most carbon cathode materials. Critical electric field for electron emission was in the range from 3 to 4 MV/m. The effective work function was estimated to be about 0.06 eV, as obtained from the slope of Fowler-Nordheim plot. The stability of the emission behavior characterized by repeated I-V measurements, was much superior to the Si tips. We observed the possibility of full area light emission in vitreous carbon materials. This results showed that the field emission is not intimately related to the $sp^3$ hybridization of carbon, but the electrical properties of cathod/electrode interface or the conductivity of the cathode materials which required for the electron transport to the cathode surface.

• Journal of the Korean Vacuum Society
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• v.9 no.2
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• pp.110-115
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• 2000

Deposition conditions of diamond thin films were optimized using hot-filament chemical vapor deposition (HFCVD). Boron-doped diamond thin films with varying boron densities were then fabricated using B4C solid pellets. Current-voltage responses and field emission currents were measured to test the characteristics of field emission display (FED). With the increase of boron doping, the crystal size of diamond decreased slightly, but its quality was not changed significantly in case of small doping. The I-V characterization was performed for Al/diamond/p-Si, and the current of doped diamond film was increased $10^4\sim10^5$ times as compared with that of undoped film. In the field emission properties, the electrons were emitted with low electric field with the increase of doping, while the emission current increased. The onset-field of electron emission was 15.5 V/$\mu\textrm{m}$ for 2 pellets, 13.6 V/$\mu\textrm{m}$ for 3 pellets and 11.1 V/$\mu\textrm{m}$ for 4 pellets. With the incorporation of boron, the slope of Fowler-Nordheim graph was decreased, revealing that the electron emission behavior was improved with the decrease of the effective barrier energy.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2012.10a
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• pp.852-855
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• 2012

A DC-DC converter for EEPROM IPs which perfom erasing by the FN (Fowler-Nordheim) tunneling and programming by the band-to-band tunneling is designed in this paper. For the DC-DC converter for EEPROM IPs using a low voltage of $1.5V{\pm}10%$ as the logic voltage, a scheme of using VRD (Read Voltage) instead of VDD is proposed to reduce the pumping stages and pumping capacitances of its charge pump circuit. VRD ($=3.1V{\pm}0.1V$) is a regulated voltage by a voltage regulator using an external voltage of 5V. The designed DC-DC converter outputs VPP (=8V) and VNN (=-8V) in the write mode.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1996.11a
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• pp.71-74
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• 1996

Ta$_2$O$_{5}$ film ale recognized as promising capacitor dielectric for future DRAM\`s. The electrical properties of Ta$_2$O$_{5}$films greatly depend on the heating condition. In the practical fabrication process, several annealing process, such as the annealing of Al in H$_2$(about 40$0^{\circ}C$) and reflow of BPSG (borophosphosilicate glass) film in $N_2$(about 80$0^{\circ}C$), exist after deposition of Ta$_2$O$_{5}$ film. In this paper, we describe the temperature effect on the electrical properties of W/Ta$_2$O$_{5}$/Si structure. The thin film of Ta$_2$O$_{5}$ and tungsten have been deposited on p-si(100) wafer using the sputtering system. The heating temperature was varied from 500 to 90$0^{\circ}C$ in $N_2$for 30min and The degree of temperature is 100\`C. In a log(J/E$^2$) Vs 1/E plot of typical I-V data, we find a linear relationship for the temperature of 500, $600^{\circ}C$ and as deposition. This could indicate Fowler-Nordheim tunneling as the dominant mode of current transports. However, we can not find a linear relationship for the temperature above $700^{\circ}C$. This could not indicate Fowler-Nordheim tunneling as the dominant mode of current transport. The high frequency (1MHz) capacitance-voltage (C-V) of W/Ta$_2$O$_{5}$/Si Capacitor were investigated on the basis of shift in the threshold voltage and dielectric constant. The magnitude of the threshold voltage and dielectric constant depends on the heating temperature, and increases with heating temperature.temperature.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.9 no.1
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• pp.120-131
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• 2016

In this paper, a 512b MTP memory IP is designed by using MTP memory cells which are written by the FN (Fowler-Nordheim) tunneling method with only MV (medium voltage) devices of 5V which uses the back-gate bias, that is VNN (negative voltage). The used MTP cell consists of a CG (control gate) capacitor, a TG (tunnel gate) transistor, and a select transistor. To reduce the size of the MTP memory cell, just two PWs (P-wells) are used: one for the TG and the select transistors; and the other for the CG capacitor. In addition, just one DNW (deep N-well) is used for the entire 512b memory cell array. VPP and VNN generators supplying pumping voltages of ${\pm}8V$ which are insensitive to PVT variations since VPP and VNN level detectors are designed by a regulated voltage, V1V (=1V), provided by a BGR voltage generator.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2003.07b
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• pp.1090-1093
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• 2003

최근에 각광을 받고 있는 전기 발광 소자를 Langmuir-Blodgett(LB)법을 이용하여 제작하였다. 사용 시료는 본 연구팀에서 합성을 하였으며, 시료는 PECCP[poly(3,6-N-2-ethylhexyl carbazolyl cyanoterephthalidene)]이며, 이 물질은 반복되는 주쇄에서 강한 전자 주게 그룹과 강한 전자 받게 그룹을 가지고 있다. PECCP 발광층을 제작하는데는 Langmuir-Blodgett(LB)법을 사용하였으며, 누적 층수에 의해 금속/고분자 계면의 특성을 조사하였다. 소자의 구조는 ITO/PECCP LB/Al과 ITO/PECCP LB/$Alq_3$/Al이며, ITO와 $Alq_3$ 사이에 발광층으로써 PECCP LB막을 도입하였다. 여기서 $Alq_3$는 전자 전달 층으로 사용되었다. PECCP LB막의 UV/visible 흡수 피크는 약 410mm에서, PL 피크는 약 536mm에서, 그리고 EL 피크도 역시 약 536nm에서 관찰되었다. 또한 $Alq_3$를 도입한 구조에서의 EL 피크 측정 결과 다양한 발광피크가 관측되었으며, Fowler-Nordheim 분석법을 이용하여 금속의 유기 막에 대한 일함수 값을 계산하였으며, 금속의 유기 막에 대한 일함수 값은 $0.18{\sim}0.26eV$이 계산되었다.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.56 no.9
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• pp.1614-1618
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• 2007

We have demonstrated the experimental results to obtain the immunity of FN (Fowler Nordheim) stress for S-RCAT (Spherical-Recess Cell Array Transistor) which has been employed to meet the requirements of data retention time and propagation delay time for sub-100-nm mobile DRAM (Dynamic Random Access Memory). Despite of the same S-RCAT structure, the immunity of FN stress of S-RCAT depends on the process condition of gate oxidation. The S-RCAT using DPN (decoupled plasma nitridation) process showed the different degradation of device properties after FN stress. This paper gives the mechanism of FN-stress degradation of S-RCAT and introduces the improved process to suppress the FN-stress degradation of mobile DRAM.