• Journal of Power Electronics
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• v.14 no.3
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• pp.507-518
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• 2014

This paper presents a new cascaded asymmetrical single phase multilevel converter with a lower number of power semiconductor switches and isolated DC sources. Therefore, the number of power electronic devices, converter losses, size, and cost are reduced. The proposed multilevel converter topology consists of two H-bridges connected in cascaded configuration. One H-bridge operates at a high frequency (high frequency inverter) and is capable of developing a two level output while the other H-bridge operates at the fundamental frequency (low frequency inverter) and is capable of developing a multilevel output. The addition of each power electronic switch to the low frequency inverter increases the number of levels by four. This paper also introduces a hybrid switching algorithm which uses very simple arithmetic and logical operations. The simplified hybrid switching algorithm is generalized for any number of levels. The proposed simplified switching algorithm is developed using a TMS320F2812 DSP board. The operation and performance of the proposed multilevel converter are verified by simulations using MATLAB/SIMULINK and experimental results.

• Proceedings of the KIPE Conference
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• 2007.07a
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• pp.74-76
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• 2007

In this paper a maximum power point tracking(MPPT) techniques for power of PV(photovoltaic) systems are presented using boost converter for a connected single phase inverter. On the basic principle of power generation for the PV module, algorithms for maximum power point tracking are described by utilizing a boost converter to adjust the output voltage of the PV module. Based on output power of a boost converter, single phase inverter uses predicted current control to control four IGBT's switch in full bridge. Furthermore a low cost control system for solar energy conversion using the DSP is developed, based on boost converter to adjust the output voltage of the PV module. The effectiveness of the proposed inverter system is confirmed experimentally and by means of simulation. Finally, experimental results confirm the superior performance of the proposed method.

• Proceedings of the KIEE Conference
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• 1993.11a
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• pp.121-125
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• 1993

This paper proposes two kinds of novel switching method for a single phase current-controlled voltage-type ac-to-dc converter. Proposed are modifications of the conventional hysteresis current control, and are named by the half suppressing method and unipolar method, respectively. The first one suppresses an inactive half of the four switching signals and uses active another half for current control. The second method uses only one, a quarter of switching signals suppresed the others. Both the simulation and experimental results show that proposed methods are more efficient in switch utilization and have comparable or better performance when compared with conventional method.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.40 no.3
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• pp.152-162
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• 2003

In this paper, Binary to Quaternary Converter(BQC), Quaternary to Binary Converter(QBC) and Quaternary inverter circuit, which is the basic logic gate, have been proposed based on voltage mode. The BQC converts the two bit input binary signals to one digit quaternary output signal. The QBC converts the one digit quaternary input signal to two bit binary output signals. And two circuits consist of Down-literal circuit(DLC) and combinational logic block(CLC). In the implementation of quaternary inverter circuit, DLC is used for reference voltage generation and control signal, only switch part is implemented with conventional MOS transistors. The proposed circuits are simulated in 0.35 ${\mu}{\textrm}{m}$ N-well doubly-poly four-metal CMOS technology with a single +3V supply voltage. Simulation results of these circuit show 250MHz sampling rate, 0.6mW power consumption and maintain output voltage level in 0.1V.

• Journal of Power Electronics
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• v.19 no.5
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• pp.1108-1121
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• 2019

The non-inverting buck-boost converter (NIBB) is a step-up and step-down DC-DC converter suitable for wide-input-voltage-range applications. However, when the input voltage is close to the output voltage, the NIBB needs to operate in the buck-boost mode, causing a significant efficiency reduction since all four switches operates in the PWM mode. Considering both the current stress limitation and the efficiency optimization, a novel design methodology for the optimal phase-shift modulation of a NIBB in the buck-boost mode is proposed in this paper. Since the four switches in the NIBB form two bridges, the shifted phase between the two bridges can serve as an extra degree of freedom for performance optimization. With general phase-shift modulation, the analytic current expressions for every duty ratio, shifted phase and input voltage are derived. Then with the two key factors in the NIBB, the converter efficiency and the switch current stress, taken into account, an objective function with constraints is derived. By optimizing the derived objective function over the full input voltage range, an offline design methodology for the optimal modulation scheme is proposed for efficiency optimization on the premise of current stress limitation. Finally, the designed optimal modulation scheme is implemented on a DSPs and the design methodology is verified with experimental results on a 300V-1.5kW NIBB prototype.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.20 no.7
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• pp.74-80
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• 2006

This paper describes a solar energy conversion strategy is applied to grid-connected single phase inverter by the maximum power point of conversion strategy. The maximum power point of tracking is controlled output power of PV(photovoltaic)modules, based on generated circuit control MOSFET switch of two boost converter for a connected single phase inverter with four IGBT's switch in full bridge. The generation control circuit allows each photovoltaic module to operate independently at peak capacity, simply by detecting of the output power of PV module. Furthermore, the generation control circuit attenuates low-frequency ripple voltage. which is caused by the full-bridge inverter, across the photovoltaic modules. The effectiveness of the proposed inverter system is confirmed experimentally and by means of simulation.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.44 no.8
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• pp.38-44
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• 2007

This paper describes a 12 bit 80MHz CMOS D/A converter for wireless transceiver. Proposed circuit in the paper employes segmented structure which consists of four stage 3bit thermometer decoders. Proposed D/A converter is manufactured 0.35um CMOS n-well digital standard process and measurement results show a ${\pm}1.36SB/{\pm}0.62LSB$ of INL/DNL and $46pV{\cdot}s$ of glitch energy. SNR and SFDR are measured to be 58.5dB and 64.97dB @ Fs=80MHz and Fin=19MHz with a total power consumption of 99mW. Such results proved that our work has low power consumption, high linearity, low glitch and improved dynamic performance. Therefore, our work can be appled to various high speed and high performance circuits.

• The Transactions of the Korean Institute of Power Electronics
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• v.24 no.3
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• pp.207-214
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• 2019

In this study, discrete-time domain analysis is proposed to investigate the input current of a buck AC/DC light-emitting diode (LED) driver. The buck power factor correction converter can operate in both discontinuous conduction mode (DCM) and continuous conduction mode (CCM). Two discontinuous and two continuous conduction operating modes are possible depending on which event terminates the conduction of the main switch in a switching cycle. All four operating modes are considered in the discrete-time domain analysis. The peak current-mode control with slope compensation is used to design a low-cost AC/DC LED driver. A slope compensation design of the buck AC/DC LED driver is described on the basis of a discrete-time domain analysis. Experimental results are presented to confirm the usefulness of the proposed analysis.