• JSTS:Journal of Semiconductor Technology and Science
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• v.15 no.1
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• pp.16-21
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• 2015

In this study, the effects of forming gas post metallization annealing (PMA) on recessed AlGaN/GaN-on-Si MOSHFET were investigated. The device employed an ICPCVD $SiO_2$ film as a gate oxide layer on which a Ni/Au gate was evaporated. The PMA process was carried out at $350^{\circ}C$ in forming gas ambient. It was found that the device instability was improved with significant reduction in interface trap density by forming gas PMA.

• Journal of IKEEE
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• v.23 no.2
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• pp.704-709
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• 2019

In this paper, the electrical characteristics of tunneling field effect transistor(TFET) was studied for different annealing conditions. The TFET samples annealed using hydrogen forming gas(4 %) and Deuterium($D_2$) forming gas(4 %). All the measurements were conducted in noise shielded environment. The results show that subthreshold slope(SS) decreased by 33 mV/dec after annealing process compared to before annealing. Under various temperature range, the noise is improved by average of 31.2 % for 10 atm Deuterium gas at $V_G=3V$ condition. It is also noticed that, post metal annealing with $D_2$ gas reduces the noise by average of 30.7 % at $I_D=100nA$ condition.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2004.07a
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• pp.41-43
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• 2004

Dielectric thin films of $(Pb_{0.72}La_{0.28})Ti_{0.93}O_3$ were deposited on $Pt(111)/Ti/SiO_2/Si$ substrates in situ by pulsed laser deposition(PLD) and annealed with different gases which are forming gas and oxygen gas, respectively. The diffusion of hydrogen into the ferroelectric film was caused by annealing process and resulted in the destruction of polarization. The dielectric properties of forming gas annealed PLT thin films, which are dielectric constant, ferroelectric characteristic, and leakage current characteristics, were degraded

• Journal of the Korean Society for Precision Engineering
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• v.18 no.12
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• pp.167-176
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• 2001

The effects of heat treatments and testing temperatures on the mechanical properties of Invar materials were investigated through experiments, which call influence the formability in metal forming fields. Annealing temperatures were changed from $900^{\circ}C$ to $1200^{\circ}C$ with an increment of $100^{\circ}C$ under two different furnace atmosphere(vacuum and H$_2$gas). Microstructure and hardness tests were performed for annealed specimens at room temperature(RT) and tensile tests were also performed by changing annealing temperatures as well as testing temperatures from RT to $300^{\circ}C$. The grain size of annealed materials increased with increasing annealing temperature, while micro-hardness distributions showed almost same hardness values regardless of annealing temperatures. Strength ratio (tensile/yield strength), which influences the forming characteristics of sheet metal, remained almost constant for various experimental conditions in case of unannealed specimens. However, it showed increasing tendency with increasing both annealing and testing temperatures, particularly at the testing temperature higher than $200^{\circ}C$. Therefore it can be concluded that press formability of fully-annealed Invar material can be improved by warm forming technique.

• JSTS:Journal of Semiconductor Technology and Science
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• v.7 no.2
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• pp.82-87
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• 2007

The electrical properties of metallic junction diodes and metallic source/drain (S/D) Schottky barrier metal-oxide-semiconductor field-effect transistor (SB-MOSFET) were simulated. By using the abrupt metallic junction at the S/D region, the short-channel effects in nano-scaled MOSFET devices can be effectively suppressed. Particularly, the effects of trap states at the metal-silicide/silicon interface of S/D junction were simulated by taking into account the tail distributions and the Gaussian distributions at the silicon band edge and at the silicon midgap, respectively. As a result of device simulation, the reduction of interfacial trap states with Gaussian distribution is more important than that of interfacial trap states with tail distribution for improving the metallic junction diodes and SB-MOSFET. It is that a forming gas annealing after silicide formation significantly improved the electrical properties of metallic junction devices.

• Journal of Sensor Science and Technology
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• v.26 no.2
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• pp.96-100
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• 2017

Poly(3,4-ethylenedioxythiophene):poly(styrenesulfonate) (PEDOT:PSS) has been extensively studied as the active material in ammonia gas sensor because of its fast response time, high conductivity and environmental stability. It is well known that a post annealing process for organic devices based on PEDOT:PSS significantly increases the device performance. In this study, we propose the solvent annealing of PEDOT:PSS and investigated its effects. As a results, post solvent annealing on PEDOT:PSS lead to the surface chemical and physical properties change. These changes result in improved conductivity of the PEDOT:PSS. In additional, ammonia sensitivity of solvent annealed PEDOT:PSS become higher than pristine polymer film. The enhancement is mainly caused by the depletion of gas barrier PSS and structural re-forming PEDOT networks. We believe that the post solvent annealing is a promising method to achieve highly sensitivity PEDOT:PSS films for applications in efficient, low-cost and flexible ammonia gas sensor.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.35 no.1
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• pp.50-57
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• 2022

Reliability of CMOS has been severed under aggressive device scaling. Conventional technologies such as lightly doped drain (LDD) and forming gas annealing (FGA) have been applied for better device reliability, but further advances are modest. Alternatively, electro-thermal annealing (ETA) which utilizes Joule heat produced by electrodes in a MOSFET, has been newly introduced for gate dielectric curing. However, concerns about mechanical stability during the electro-thermal annealing, have not been discussed, yet. In this context, this paper demonstrates the mechanical stability of nanosheet FET during the electro-thermal annealing. The effect of mechanical stresses during the electro-thermal annealing was investigated with respect to device design parameters.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.17 no.6
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• pp.580-585
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• 2004

Silicon dioxide (SiO$_2$) is widely used as a gate dielectric material for thin film transistors (TFT) and semiconductor devices. In this paper, SiO$_2$ films were grown by APCVD(Atmospheric Pressure chemical vapor deposition) at the high temperature. Experimental investigations were carried out as a function of $O_2$ gas flow ratios from 0 to 200 1pm. This article presents the SiO$_2$ gate dielectric studies in terms of deposition rate, refrative index, FT-IR, C-V for the gate dielectric layer of thin film transistor applications. We also study defect passivation technique for improvement interface or surface properties in thin films. Our passivation technique is Forming Gas Annealing treatment. FGA acts passivation of interface and surface impurity or defects in SiO$_2$ film. We used RTP system for FGA and gained results that reduced surface fixed charge and trap density of midgap value.

• JSTS:Journal of Semiconductor Technology and Science
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• v.1 no.2
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• pp.95-102
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• 2001

Hafnium oxide thin films for gate dielectric were deposited at $300^{\circ}C$ on p-type Si (100) substrates by plasma enhanced chemical vapor deposition (PECVD) and annealed in $O_2$ and $N_2$ ambient at various temperatures. The effect of hydrogen treatment in 4% $H_2$ at $350^{\circ}C$ for 30 min on the electrical properties of $HfO_2$for gate dielectric was investigated. The flat-band voltage shifts of $HfO_2$capacitors annealed in $O_2$ambient are larger than those in $N_2$ambient because samples annealed in high oxygen partial pressure produces the effective negative charges in films. The oxygen loss in $HfO_2$films was expected in forming gas annealed samples and decreased the excessive oxygen contents in films as-deposited and annealed in $O_2$ or $N_2$ambient. The CET of films after hydrogen forming gas anneal almost did not vary compared with that before hydrogen gas anneal. Hysteresis of $HfO_2$films abruptly decreased by hydrogen forming gas anneal because hysteresis in C-V characteristics depends on the bulk effect rather than $HfO_2$/Si interface. The lower trap densities of films annealed in $O_2$ambient than those in $N_2$were due to the composition of interfacial layer becoming closer to $SiO_2$with increasing oxygen partial pressure. Hydrogen forming gas anneal at $350^{\circ}C$ for samples annealed at various temperatures in $O_2$and $N_2$ambient plays critical role in decreasing interface trap densities at the Si/$SiO_2$ interface. However, effect of forming gas anneal was almost disappeared for samples annealed at high temperature (about $800^{\circ}C$) in $O_2$ or $N_2$ambient.

• Proceedings of the Materials Research Society of Korea Conference
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• 1998.05a
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• pp.93-93
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• 1998