• Proceedings of the Korean Operations and Management Science Society Conference
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• 2003.11a
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• pp.297-300
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• 2003

This paper considers formal verification methods for enhancing software reliability. The formal method verifies that a software is correctly implemented according to its specification by using a mathematical formalism. This paper presents a partial survey on the formal methods and discusses possible applications for the improved software implementation. Finally, some topics are remarked as further studies.

• Nuclear Engineering and Technology
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• v.44 no.8
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• pp.929-938
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• 2012

The Computerized Procedure System (CPS) is one of the primary operating support systems in the digital Main Control Room. The CPS displays procedure on the computer screen in the form of a flow chart, and displays plant operating information along with procedure instructions. It also supports operator decision making by providing a system decision. A procedure flow should be correct and reliable, as an error would lead to operator misjudgment and inadequate control. In this paper we present a modeling for the CPS that enables formal verification based on Petri nets. The proposed State Token Petri Nets (STPN) also support modeling of a procedure flow that has various interruptions by the operator, according to the plant condition. STPN modeling is compared with Coloured Petri net when they are applied to Emergency Operating Computerized Procedure. A converting program for Computerized Procedure (CP) to STPN has been also developed. The formal verification and validation methods of CP with STPN increase the safety of a nuclear power plant and provide digital quality assurance means that are needed when the role and function of the CPS is increasing.

• Proceedings of the Korean Information Science Society Conference
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• 2000.10a
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• pp.486-488
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• 2000

본 연구는 정형기법을 사용하여 Safety-Critical System의 개발 방법론을 제시한다. Safety-Critical System의 전체적인 개발 과정을 제시하고 Safety-Critical System 중의 하나인 원자력 발전소 시스템 중 Reactor Protection System(RPS)을 정형 명세(Formal Specification)하고 정형 검증(Formal Verification)하는 과정과 그에 따른 각 과정의 Compliance를 확인하는 예를 든다. 여기서 정형 명세에는 Software Cost Reduction(SCR)이하는 도구가 사용되었고, 정형 검증에는 SPIN이, Compliance를 확인하는 데에는 Prototype Verification System(PVS)를 사용하였다.

• The KIPS Transactions:PartD
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• v.12D no.7 s.103
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• pp.931-936
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• 2005

There may be subtle errors in embedded software since its functionality is very complex. Thus formal verification for detecting them is very needed. Model checking is one of formal verification techniques, and SLAM is a well-known software model checking tool for verifying safety properties of embedded C program. In this paper, we develop a software model checker like SLAM for verifying embedded Java program Compared to SLAM, our tool allows to verify liveness properties as well as safety ones. As a result, we verify some desired properties in embedded Java program for controlling REGO robot.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.10 no.8
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• pp.1435-1442
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• 2006

The ideal method of safety evaluation is to verify results of execution against all possible operations within operating system, but it is impossible. However, the formal method can theoretically prove the safety on actual logic of operating system. Therefore we explain the contents of the art of the safety verification of security kernel, and make a comparative study of various standardized formal verification tools. And then we assigned PVS(Prototype Verification system) of SRI(Stanford Research Institute) to verify the safety of a modified BLP(Bell & LaPadula) model, the core access control model of multi-lavel based security kernel. Finally, we describe formal specification of the revised BLP model using the PVS, and evaluate the safety of the model by inspecting the specification of the PVS.

• International Journal of Computer Science & Network Security
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• v.24 no.3
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• pp.151-159
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• 2024

Twin clutch model enables the power-shifts as conventional planetary automatic transmission and eradicates the disadvantages of single clutch trans- mission. The automatic control of the dual clutches is a problem. Particularly to control the clutching component that engages when running in one direction of revolution and disengages when running the other direction, which exchange the torque smoothly during torque phase of the gearshifts on planetary-type automatic transmissions, seemed for quite a while hard to compensate through clutch control. Another problem is to skip gears during multiple gearshifts. However, the twin clutch gear control described in ["M Goetz, M C Levesley and D A Crolla. Dynamics and control of gearshifts on twin clutch transmissions, Proceedings of the Institution of Mechanical Engineers, Part D: Journal of Automobile Engineering 2005"], a significant improvement in twin clutch gear control system is discussed. In this research our objective is to formally specify the twin clutch gear control system and verify it with the help of formal methods. Formal methods have a high potential to give correctness estimating techniques. We use UPPAAL for formal specification and verification. Our results show that the twin clutch gear control model partially fulfills its functional requirements.

• Journal of the Korea Institute of Military Science and Technology
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• v.10 no.1
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• pp.55-69
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• 2007

The paper provides the approach to apply formal methods to the development and certification criteria of defense safety/security-critical software. RTCA/DO-178B is recognized as a do facto international standard for airworthiness certification but lack of concrete activities and vagueness of verification/certification criteria have been criticized. In the case of MoD Def Stan 00-55, the guidelines based on formal methods are concrete enough and structured for the defense safety-related software. Also Common Criteria Evaluation Assurance Level includes the strict requirements of formal methods for the certification of high-level security software. By analyzing the problems of DO-178B and comparing it with MoD Def Stan 00-55 and Common Criteria, we identity the important issues In safety and security space. And considering the identified issues, we carry out merging of DO-178B and CC EAL7 on the basis of formal methods. Also the actual case studies for formal methods applications are shown with respect to the verification and reuse of software components.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.9 no.5
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• pp.169-174
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• 2009

In this paper, We define convert rules objects and relation presented in object model to the state and operation domain in formal specification. we implement simulation tool in order to verification method of formal specification and to consistency verified model between user's requirement. It is possible to select the suitable model and reduce the costs and efforts on software development.

• Proceedings of the KIEE Conference
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• 2005.07d
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• pp.2489-2491
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• 2005

Currently, Programmable Logic Contorller(PLC) uses Real Time Operation System(RTOS) as basic OS. RTOS executes defined results as to defined time. General features of RTOS emphasize the priority in each task, high-speed process of external interrupt, task scheduling, synchronization in task, the limitation of memory capacity. For safety critical placement, PLC software needs Verification and Validation(V&V). For example, nuclear power plant. In this paper, PLC RTOS is verified by formal methods. Particularly, formal method V&V uses verification tool called 'STATEMATE', and shows the results.

• International Journal of Computer Science & Network Security
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• v.24 no.4
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• pp.192-196
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• 2024

The memory coherence problem occurs while mapping shared virtual memory in a loosely coupled multiprocessors setup. Memory is considered coherent if a read operation provides same data written in the last write operation. The problem is addressed in the literature using different algorithms. The big question is on the correctness of such a distributed algorithm. Formal verification is the principal term for a group of techniques that routinely use an analysis that is established on mathematical transformations to conclude the rightness of hardware or software behavior in divergence to dynamic verification techniques. This paper uses UPPAAL model checker to model the dynamic distributed algorithm for shared virtual memory given by K.Li and P.Hudak. We analyse the mechanism to keep the coherence of memory in every read and write operation by using a dynamic distributed algorithm. Our results show that the dynamic distributed algorithm for shared virtual memory partially fulfils its functional requirements.