• Proceedings of the IEEK Conference
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• 2005.11a
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• pp.715-718
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• 2005

Mobile devices is getting to include more functions according to the demand of digital convergence. Applications based on 3D graphic calculation such as 3D games and navigation are one of the functions. 3D graphic calculation requires heavy calculation. Therefore, we need dedicated 3D graphic hardware unit with high performance. 3D graphic calculation needs a lot of complicated floating-point arithmetic operation. However, most of current mobile 3D graphics processors do not have efficient architecture for mobile devices because they are based on those for conventional computer systems. In this paper, we propose arithmetic units for special functions of lighting operation of 3D graphics. Transcendental arithmetic units are designed using approximation of logarithm function. Special function units for lighting operation such as reciprocal, square root, reciprocal of square root, and power can be obtained. The proposed arithmetic unit has lower error rate and smaller silicon area than conventional arithmetic architecture.

• Proceedings of the Korean Institute of Navigation and Port Research Conference
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• 2010.04a
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• pp.187-188
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• 2010

플로팅 아일랜드 리조트 조성을 위한 자연환경 및 인프라시설을 충분히 갖추고 있는 부산은 플로팅 구조물에 대한 관심이 크다. 따라서 본 연구는 플로팅 아일랜드 리조트 조성을 위한 전제조건과 대상지 선정을 위한 6가지 고려사항들을 통해 후보지를 선정하고 각 후보지에 적합한 시설을 제시하였다. 또한 조성 후보지에 플로팅 인공섬 리조트 기본계획을 실시하였다.

• Proceedings of the KIEE Conference
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• 2008.04c
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• pp.149-151
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• 2008

This paper presents an architecture for driving multiple parallel cold cathode fluorescent lamps (CCFLs) for back lighting applications. The key to the architecture is a proposed capacitive coupling approach for lamp ignition. This system is consist of a flyback converter, a single inverter to drive multiple lamps and conductive floating reflector. The topology is capable of driving a number of parallel lamps with independent accurate lamp, current regulation and improving cost effectiveness with significant reduction in size and weight, compared to typical high frequency ac ballast. Experimental demonstration results for ten of parallel CCFLs with simultaneous ignition.

• Journal of the Society of Naval Architects of Korea
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• v.45 no.1
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• pp.63-72
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• 2008

This study considers the motion response of multiple adjacent floating bodies in waves. As a method of solution, a three-dimensional Rankine panel method is adopted in time domain. For the validation of the developed numerical method, the motions of two adjacent Series 60 hulls and ship-barge model are estimated. The computational results are compared with other numerical and experimental analyses, showing favorable agreement.

• Proceedings of the KIEE Conference
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• 2008.07a
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• pp.1007-1009
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• 2008

This paper presents an architecture for driving multiple paralleled cold cathode fluorescent lamps (CCFLs) for back lighting applications. The key to the architecture is a proposed capacitive coupling approach for lamp ignition. This system is consist of a flyback converter, a single inverter to drive multiple lamps and conductive floating reflector. The topology is capable of driving a number of parallel lamps with independent accurate lamp, current regulation and improving cost effectiveness with significant reduction in size and weight, compared to typical high frequency ac ballast. Experimental demonstration results for ten of parallel CCFLs with simultaneous ignition. This like the EEFL it will be able to use the CCFL is the thing. Also, it investigates the effect where the leakage current goes mad to the Lamp.

• Proceedings of the KIEE Conference
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• 2008.10c
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• pp.126-128
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• 2008

This paper presents an architecture for driving multiple paralleled cold cathode fluorescent lamps (CCFLs) for back lighting applications. Multi CCFL operation and increase of brightness, the key to the architecture is a proposed capacitive coupling approach for lamp ignition. This system is consist of a flyback converter, a single inverter to drive multiple lamps and conductive floating reflector. The topology is capable of driving a number of parallel lamps with independent accurate lamp, The capacitive coupling the leakage inductance and stray capacitance creation which it used, current regulation and improving cost effectiveness with significant reduction in size and weight, compared to typical high frequency ac ballast. Experimental demonstration results for ten of parallel CCFLs with simultaneous ignition.

• Journal of Power System Engineering
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• v.18 no.3
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• pp.36-41
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• 2014

The structure of a variable liquid column oscillator(a VLCO) is analogous to that of the tuned liquid column damper used to suppress oscillatory motion in large structures like tall buildings and cargo ships. The VLCO is a system absorbing high kinetic energy of accelerated motions of the multiple floating bodies in the effect of air springs occurred by installation of inner air chambers. Thus, VLCO can improve the efficiency of energy than wave energy converters of the activating object type made in Pelamis Company. In this research, the experiment was performed in two models of same draft. The one is that weights were filled, and the other is that water was filled. The numerical results were estimated by assuming that do not exist internal flow, and the results were compared with the results of experiments.

• Electronics and Telecommunications Trends
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• v.32 no.6
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• pp.57-65
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• 2017

Neural network based AI computing is a promising technology that reflects the recognition and decision operation of human beings. Early AI computing processors were composed of GPUs and CPUs; however, the dramatic increment of a floating point operation requires an energy efficient AI processor with a highly parallelized architecture. In this paper, we analyze the trends in processor architectures for AI computing. Some architectures are still composed using GPUs. However, they reduce the size of each processing unit by allowing a half precision operation, and raise the processing unit density. Other architectures concentrate on matrix multiplication, and require the construction of dedicated hardware for a fast vector operation. Finally, we propose our own inAB processor architecture and introduce domestic cutting-edge processor design capabilities.

• International Journal of Naval Architecture and Ocean Engineering
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• v.6 no.3
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• pp.598-625
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• 2014

To support the procedure for determining an optimal liquefaction cycle for FLNG FEED, an ontological modeling method which can automatically generate various alternative liquefaction cycles were carried out in this paper. General rules in combining equipment are extracted from existing onshore liquefaction cycles like C3MR and DMR cycle. A generic relational model which represents whole relations of the plant elements has all these rules, and it is expressed by using the system entity structure (SES), an ontological framework that hierarchically represents the elements of a system and their relationships. By using a process called pruning which reduces the SES to a candidate, various alternative relational models of the liquefaction cycles can be automatically generated. These alternatives were provided by XML-based formats, and they can be used for choosing an optimal liquefaction cycle on the basis of the assessments such as process simulation and reliability analysis.

• The Transactions of the Korean Institute of Electrical Engineers D
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• v.53 no.8
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• pp.578-584
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• 2004

The CSVM(Current Support Vector Machine) that is a digital architecture performing all phases of recognition process including kernel computing, learning, and recall of SVM(Support Vector Machine) on a chip is proposed. Concurrent operation by parallel architecture of elements generates high speed and throughput. The classification problems of bio data having high dimension are solved fast and easily using the CSVM. Quadratic programming in original SVM learning algorithm is not suitable for hardware implementation, due to its complexity and large memory consumption. Hardware-friendly SVM learning algorithms, kernel adatron and kernel perceptron, are embedded on a chip. Experiments on fixed-point algorithm having quantization error are performed and their results are compared with floating-point algorithm. CSVM implemented on FPGA chip generates fast and accurate results on high dimensional cancer data.