• Title/Summary/Keyword: Fixed-point optimization

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RSNT-cFastICA for Complex-Valued Noncircular Signals in Wireless Sensor Networks

  • Deng, Changliang;Wei, Yimin;Shen, Yuehong;Zhao, Wei;Li, Hongjun
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • v.12 no.10
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    • pp.4814-4834
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    • 2018
  • This paper presents an architecture for wireless sensor networks (WSNs) with blind source separation (BSS) applied to retrieve the received mixing signals of the sink nodes first. The little-to-no need of prior knowledge about the source signals of the sink nodes in the BSS method is obviously advantageous for WSNs. The optimization problem of the BSS of multiple independent source signals with complex and noncircular distributions from observed sensor nodes is considered and addressed. This paper applies Castella's reference-based scheme to Novey's negentropy-based algorithms, and then proposes a novel fast fixed-point (FastICA) algorithm, defined as the reference-signal negentropy complex FastICA (RSNT-cFastICA) for complex-valued noncircular-distribution source signals. The proposed method for the sink nodes is substantially more efficient than Novey's quasi-Newton algorithm in terms of computational speed under large numbers of samples, can effectively improve the power consumption effeciency of the sink nodes, and is significantly beneficial for WSNs and wireless communication networks (WCNs). The effectiveness and performance of the proposed method are validated and compared with three related BSS algorithms through theoretical analysis and simulations.

Real-time Implementation or AMR-WB Speech Coder Using TMS320C5509 DSP (TMS320C5509 DSP를 이용한 AMR-WB 음성부호화기의 실시간 구현)

  • Choi Song-ln;Jee Deock-Gu
    • The Journal of the Acoustical Society of Korea
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    • v.24 no.1
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    • pp.52-57
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    • 2005
  • The adaptive multirate wideband (AMR-WB) speech coder has an extended audio bandwidth from 50 Hz to 7 kBz and operates on nine speech coding bit-rates from 6.6 to 23.85 kbit/s. In this Paper, we present the real-time implementation of AMR-WB speech coder using 16bit fixed-point TMS320C5509 that has dual MAC units. Firstly, We implemented AMR-WB speech coder in C 1anguage level using intrinsics, and then performed optimization in assembly language. The computational complexity of the implemented AMR-WB coder at 23.85 kbit/s is 42.9 Mclocks. And this coder needs the program memory of 15.1 kwords, data ROM of 9.2 kwords and data RAM of 13.9 kwords.

An Study on the Optimization of Sub-chamber Geometry in CVC with Sub-chamber (부실을 가진 정적연소기에서 부실형상의 최적화 연구)

  • Park, Jong-Sang;Kang, Byung-Mu;Yeum, Jung-Kuk;Ha, Jong-Yul;Chung, Sung-Sik
    • Journal of ILASS-Korea
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    • v.10 no.2
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    • pp.1-9
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    • 2005
  • An experimental study was carried out to obtain the fundamental data about the effects of radical ignition on premixture combustion. A CVC(constant volume combustor) divided into the sub-chamber and the main chamber was used. Numerous narrow passage holes are arranged between the main chamber and the sub-chamber. The products including radicals generated by spark ignition in tile sub-chamber derives the simultaneous multi-point ignition in the main chamber. We have examined the effects of the sub-chamber volume, the diameter and number of passage holes, and the equivalence $ratio({\Phi})$ on the combustion characteristics by means of burning pressure measurement and flame visualization. In a CVC, the overall burning time including the ignition delay became very short and the maximum burning pressure was slightly increased by the radical ignition(RI) method in comparison with those by the conventional spark ignition(SI) method. Combustible lean limit by RI method is extended by ${\Phi}=0.25$ compared with that by SI method. Also, In cases of charging the number and the diameter for the fixed total cross section of the passage holes, combustion period increased significantly at a sub-chamber with a single hole, but those of the other conditions had almost a similar tendency in the sub-chamber with 4 or more holes. regardless of equivalence ratio. Therefore, it was Proved that a critical cross section exists with the number of passage holes.

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Effect of Controlling Exhaust Valve Timing on Engine Efficiency in LIVC and EIVC States in a 2-Cylinder Small Turbo Gasoline Engine (2기통 소형 터보가솔린엔진에서 배기 밸브 타이밍 제어에 따른 LIVC, EIVC 상태에서의 엔진 효율 영향)

  • Jang, Jinyoung;Woo, Youngmin;Shin, Youngjin;Ko, Ahyun;Jung, Yongjin;Cho, Chongpyo;Kim, Gangchul;Pyo, Youngdug;Han, Myunghoon
    • Journal of ILASS-Korea
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    • v.27 no.3
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    • pp.117-125
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    • 2022
  • This study examines whether engine fuel efficiency is improved by optimization of the exhaust valve timing in a state where the intake valve timing has been optimized in a small turbo gasoline engine that has intake cams and exhaust cams with fixed valve opening periods. When the exhaust valve is opened late, the expansion stroke is longer, and the efficiency can be improved. A 2-cylinder turbo gasoline engine with 0.8 liters of displacement and an MPI (Multi Point Injection) fuel system was used. The engine was operated at 1,500 and 3,000 rpm, and the load conditions included a partial load of 50 N·m and a high load of 70 N·m. Data was recorded as the exhaust valve timing was controlled, and this was used to calculate the efficiency of combustion using a heat release, the fuel conversion efficiency, and the pumping loss. Results and the hydrocarbon concentrations in the exhaust gas were compared for each condition. Experiment results confirmed that additional fuel efficiency improvements are possible through exhaust valve timing control at 1,500 rpm and 50 N·m. However, in other operating conditions, fuel efficiency improvements could not be obtained through exhaust valve timing control because cases where the pumping loss and fuel/air mixture slip increased when the exhaust valve timing changed and the fuel efficiency declined.

Contrast Optimization using of Weight-based Injection Protocol in Pediatric Abdomen CT Examination (소아 복부 CT 검사에서 체중에 기반한 조영제 주입 프로토콜 적용에 따른 조영증강의 최적화)

  • Kim, Yung-Kyoon;Han, Dong-Kyoon
    • Journal of the Korean Society of Radiology
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    • v.15 no.5
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    • pp.575-584
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    • 2021
  • The aim of this study was to achieve optimal portal phase while reducing contrast medium by applying weight-based dose protocol compared to standard fixed dose protocol to performing of pediatric abdominal CT examination. Discovery 750HD (General Electric Medical Systems, Milwaukee, USA) was used, and a total of 167 children consisting of 85 men and 82 women under the age of 18 were studied. The group in which the 300 mgI/ml(Xenetix, Guerbet, France) contrast medium was fixedly injected at twice body weight and the group injected with physiological saline while gradually decreasing the injection amount by 10% while applying the weight-based protocol were distinguished. Also, the CT number and SNR of abdominal organs were compared and evaluated while changing the scan delay time. Subjective image quality of enhancement and beam-hardening artifacts of around the heart was assessed with five-point criterion. The group adapted weight-based protocol with 20% reduction in contrast medium was most similar in contrast enhancement in the group with fixed injection at twice body weight. Furthermore, the group with a delay time of 20% had the highest contrast enhancement effect, and the difference in CT attenuation coefficient from the group scanned immediately after injection of the contrast media. Therefore, the appropriate delay time after injection of the contrast agent increased the contrast enhancement of the parenchymal organ. In addition, the weight-based injection protocol with normal saline reduced artifacts around the heart, and the effect of contrast enhancement could be maintained. In conclusion, it is possible to reduce dosage of contrast media through the application of weight-based injection protocols and appropriate latency, and to characterize optimal portal phase imaging on pediatric abdominal CT.

Optimized DSP Implementation of Audio Decoders for Digital Multimedia Broadcasting (디지털 방송용 오디오 디코더의 DSP 최적화 구현)

  • Park, Nam-In;Cho, Choong-Sang;Kim, Hong-Kook
    • Journal of Broadcast Engineering
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    • v.13 no.4
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    • pp.452-462
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    • 2008
  • In this paper, we address issues associated with the real-time implementation of the MPEG-1/2 Layer-II (or MUSICAM) and MPEG-4 ER-BSAC decoders for Digital Multimedia Broadcasting (DMB) on TMS320C64x+ that is a fixed-point DSP processor with a clock speed of 330 MHz. To achieve the real-time requirement, they should be optimized in different steps as follows. First of all, a C-code level optimization is performed by sharing the memory, adjusting data types, and unrolling loops. Next, an algorithm level optimization is carried out such as the reconfiguration of bitstream reading, the modification of synthesis filtering, and the rearrangement of the window coefficients for synthesis filtering. In addition, the C-code of a synthesis filtering module of the MPEG-1/2 Layer-II decoder is rewritten by using the linear assembly programming technique. This is because the synthesis filtering module requires the most processing time among all processing modules of the decoder. In order to show how the real-time implementation works, we obtain the percentage of the processing time for decoding and calculate a RMS value between the decoded audio signals by the reference MPEG decoder and its DSP version implemented in this paper. As a result, it is shown that the percentages of the processing time for the MPEG-1/2 Layer-II and MPEG-4 ER-BSAC decoders occupy less than 3% and 11% of the DSP clock cycles, respectively, and the RMS values of the MPEG-1/2 Layer-II and MPEG-4 ER-BSAC decoders implemented in this paper all satisfy the criterion of -77.01 dB which is defined by the MPEG standards.

Real-Time Implementation of Acoustic Echo Canceller for Mobile Handset Using TeakLite DSP Core (Teaklite DSP Core 를 이용한 이동통신 단말기용 음향반향제거기의 실시간 구현)

  • Gwon, Hong-Seok;Kim, Si-Ho;Jang, Byeong-Uk;Bae, Geon-Seong
    • Journal of the Institute of Electronics Engineers of Korea SP
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    • v.39 no.2
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    • pp.128-136
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    • 2002
  • In this paper, we developed an acoustic echo canceller in real-time using TeakLite DSP Core, which will be placed in the vocoder chip of a mobile handset. Considering the limited computational capacity given to the acoustic echo canceller in a vocoder chip, we employed a FIR-type adaptive filter using a conventional NLMS algorithm. To begin with, we designed and implemented an acoustic echo canceller with floating-point format C-source code, and then converted it into fixed-point format through integer simulation. Then we programmed and optimized it in the assembler level to make it run ill real-time. After optimization procedure, the implemented echo canceller has approximately 624 words of program memory and 811 words of data memory. With 8 KHz sampling rate and 256 filter taps in the echo canceller that corresponds to 32 msec of echo delay, it requires 14.12 MIPS of computational capacity. For coverage of 16 msec echo delay, i.e., 128 filter taps, 9 MIPS is requited.

Real-Time DSP Implementation of IMT-2000 Speech Coding Algorithm (IMT-2000 음성부호화 알고리즘의 실시간 DSP 구현)

  • Seo, Jeong-Uk;Gwon, Hong-Seok;Park, Man-Ho;Bae, Geon-Seong
    • Journal of the Institute of Electronics Engineers of Korea SP
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    • v.38 no.3
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    • pp.304-315
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    • 2001
  • In this paper, we peformed the real-time implementation of AMR(Adaptive Multi-Rate) speech coding algorithm which is adopted for IMT-2000 service using TMS320C6201, i.e., a Texas Instrument´s fixed-point DSP. With the ANSI C source code released from ETSI, optimization is performed to make it run in real-time with memory as small as possible using the C compiler and assembly language. Implemented AMR speech codec has the size of 32.06 kWords program memory, 9.75 kWords data RAM memory, and 19.89 kWords data ROM memory. And, The time required for processing one frame of 20 ms length speech data is about 4.38 ms, and it is short enough for real-time operation. It is verified that the decoded result of the implemented speech codec on the DSP is identical with the PC simulation result using ANSI C code for test sequences. Also, actual sound input/output test using microphone and speaker demonstrates its proper real-time operation without distortions or delays.

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Using a H/W ADL-based Compiler for Fixed-point Audio Codec Optimization thru Application Specific Instructions (응용프로그램에 특화된 명령어를 통한 고정 소수점 오디오 코덱 최적화를 위한 ADL 기반 컴파일러 사용)

  • Ahn Min-Wook;Paek Yun-Heung;Cho Jeong-Hun
    • The KIPS Transactions:PartA
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    • v.13A no.4 s.101
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    • pp.275-288
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    • 2006
  • Rapid design space exploration is crucial to customizing embedded system design for exploiting the application behavior. As the time-to-market becomes a key concern of the design, the approach based on an application specific instruction-set processor (ASIP) is considered more seriously as one alternative design methodology. In this approach, the instruction set architecture (ISA) for a target processor is frequently modified to best fit the application with regard to code size and speed. Two goals of this paper is to introduce our new retargetable compiler and how it has been used in ASIP-based design space exploration for a popular digital signal processing (DSP) application. Newly developed retargetable compiler provides not only the functionality of previous retargetable compilers but also visualizes the features of the application program and profiles it so that it can help architecture designers and application programmers to insert new application specific instructions into target architecture for performance increase. Given an initial RISC-style ISA for the target processor, we characterized the application code and incrementally updated the ISA with more application specific instructions to give the compiler a better chance to optimize assembly code for the application. We get 32% performance increase and 20% program size reduction using 6 audio codec specific instructions from retargetable compiler. Our experimental results manifest a glimpse of evidence that a higgly retargetable compiler is essential to rapidly prototype a new ASIP for a specific application.

Optimization of Cultivational Conditions of Rice(Oryza sativa L.) by a Central Composite Design Applied to an Early Cultivar in Southern Region (중심합성계획법에 의한 남부 조생벼 재배요인의 최적조건 구명)

  • Shon, Gil-Man;Kim, Jeung-Kyo;Choe, Zhin-Ryong;Lee, Yu-Sik;Park, Joong-Yang
    • KOREAN JOURNAL OF CROP SCIENCE
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    • v.34 no.1
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    • pp.60-73
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    • 1989
  • Two field experiments were carried out to assess the applicability of a central composite design (CCD) in determining optimum culture condition of an early rice cultivar, Unbongbyeo in southern Korea. A central composite design with two replicates was applied to five levels of five factors such as the number of hills per 3.3m2, the number of seedlings per hill, the levels of nitrogen, the transplanting date and the seedling age (Experiment 1). The levels of planting density were ranged from 30 hills to 150 hills per 3.3m2 ; the number of seedlings per hill from 1 seedling to 9 seedlings per hill; the levels of nitrogen application from 1 kg/l0a to 21 kg/l0a; the transplanting date from June 15 to July 5; the seedling age from 25 days to 45 days. A fractional factorial design was applied to three levels of five factors tested in CCD (Experiment 2). Yield per hill and per unit area were examined and the results obtained from both experiments were compared. The benefits from the central composite design were discussed. Maximum yield of brown rice per unit area was obtained at the combination of the central levels of one of five factors when the other four factors were fixed at central point. Furthermore, brown rice yield per unit area affected by interaction of two factors was maximized at the central point when the remain three factors being fixed at the central level. The responses of five factors to brown rice yield per hill and unit area were found to be a saddle point in both designs. Actual values of the stationary points were 107 hills per 3.3 m2, 4 seedlings per hill, 10 kg nitrogen per l0a, transplanting date of rice on June 26 and 33 days of seedling age in the central composite design. Brown rice yield per unit area at the stationary points were estimated 439 kg/l0a in the central composite design and 442 kg/l0a in the fractional factorial design. Considering the number of experimental treatment combinations, the central composite design was rather convenient in reducing the number of treatment combinations for similar information. It was more convenient for an experimenter to present the results from the central composite design than those from the fractional factorial design. Considering the optimum yields of brown rice per unit area at the stationary points being verified as saddle points in both designs. inter-heterogeneity of each of the factors should be avoided in setting up factors in pursuit of inducing unidirectional response of the factors to yield. Even though both the lower and higher levels in the central composite design being beyond the region of an experimenter's interest. they were considered highly valued in interpretation of the results. Conclusively. the central composite design was found to be more beneficial to optimize culture condition of paddy rice even with several levels of various factors were involved.

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