• Journal of Electrical Engineering and Technology
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• 제11권6호
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• pp.1674-1683
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• 2016

In this paper, a Finite Control Set Model Predictive Control (FCS-MPC) for a five level cascaded multilevel inverter (CMLI) with reduced switch topology is proposed. Five switches are used here instead of conventionally used eight switches. The main contribution of this paper is to make the MPC controller work for the reduced switch topology using only 19 voltage vectors in place of conventional 61 voltage vectors for a five level CMLI. This simplifies the execution of the MPC algorithm, paving a way for the significant reduction in the computational time. The controller makes use of the excellent ability of MPC to multitask, by adding one more objective which is to reduce the average switching frequency in addition to controlling the load current. This is especially important, since switching losses and therefore switching frequency is significant for high-power applications. The trade-off of this MPC is that the current is not as smooth as the 61 vector scheme, but well within the limits of IEEE standards. The results shown prove that this MPC works well in steady state and dynamic conditions too.

• Journal of Power Electronics
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• 제19권4호
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• pp.989-999
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• 2019

This paper proposes a fault-tolerant control strategy with finite control set model predictive control (FCS-MPC) based on hierarchical optimization for five-level H-bridge neutral-point-clamped (5L-HNPC) inverter-fed induction motor drives. Fault-tolerant operation is analyzed, and the fault-tolerant control algorithm is improved. Adopting FCS-MPC based on hierarchical optimization, where the voltage is used as the controlled objective, called model predictive voltage control (MPVC), the postfault controller is simplified as a two layer control. The first layer is the voltage jump limit, and the second layer is the voltage following control, which adopts the optimal control strategy to ensure the current following performance and uniqueness of the optimal solution. Finally, simulation and experimental results verify that 5L-HNPC inverter-fed induction motor drives have strong fault tolerant capability and that the FCS-MPVC based on hierarchical optimization is feasible.

• 전력전자학회논문지
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• 제15권5호
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• pp.376-380
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• 2010

본 논문에서는 양방향 스위치를 가지는 기존의 5-레벨 인버터를 직렬 결합하여 다수의 출력 전압 레벨을 형성할 수 있는 멀티레벨 인버터 구조를 제안한다. 무엇보다도 제안된 회로의 입력 전압원 크기를 5의 배수로 구성함으로서 보다 많은 수의 레벨을 생성시킬 수 있다. 동일한 수의 출력 전압 레벨 형성시 기존의 Cascaded H-bridge cell 방식보다 스위칭 소자를 줄일 수 있어 시스템 크기, 비용, 전력 손실을 저감시킬 수 있는 장점을 가진다. 두 대의 5-레벨 인버터를 직렬 결합함으로써 25-레벨의 출력전압을 생성시킬 수 있는 인버터에 대한 특성을 분석하고 시뮬레이션과 실험을 통해 타당성을 검증한다.

• Journal of Electrical Engineering and Technology
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• 제8권2호
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• pp.304-315
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• 2013

In this paper, analysis of cascaded H-bridge multilevel inverter in DTC-SVM (Direct Torque Control-Space Vector Modulation) based induction motor drive for FCEV (Fuel Cell Electric Vehicle) is presented. Cascaded H-bridge multilevel inverter uses multiple series units of H-bridge power cells to achieve medium-voltage operation and low harmonic distortion. In FCEV, a fuel cell stack is used as the major source of electric power moreover the battery and/or ultra-capacitor is used to assist the fuel cell. These sources are suitable for utilizing in cascaded H-bridge multilevel inverter. The drive control strategy is based on DTC-SVM technique. In this scheme, first, stator voltage vector is calculated and then realized by SVM method. Contribution of multilevel inverter to the DTC-SVM scheme is led to achieve high performance motor drive. Simulations are carried out in Matlab-Simulink. Five-level and nine-level inverters are applied in 3hp FCEV induction motor drive for analysis the multilevel inverter. Each H-bridge is implemented using one fuel cell and battery. Good dynamic control and low ripple in the torque and the flux as well as distortion decrease in voltage and current profiles, demonstrate the great performance of multilevel inverter in DTC-SVM induction motor drive for vehicle application.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1992년도 하계학술대회 논문집 B
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• pp.1119-1122
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• 1992

This paper deals with a novel method of modeling and analyzing multilevel pulse width modulation(PWM) inverter/rectifier, which leads to extraction of equivalent circuit in fundamental frequency domain. By the technique, we can draw out the corresponding linear time invariant circuit even thuogh the actual circuit is switched. A static VAR compensator using five-level inverter is modeled and simulated for the verification of the modeling.

• 전력전자학회논문지
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• 제20권5호
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• pp.448-455
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• 2015

A model predictive control (MPC) method without individual PWM has been recently researched to simplify and improve the control flexibility of a multilevel inverter. However, the input power of each H-bridge cell and the switching frequency of switching devices are unbalanced because of the use of a restricted switching state in the MPC method. This paper proposes a control method for balancing the switching patterns and cell power supplied from each isolated dc source of a cascaded H-bridge inverter. The supplied dc power from isolated dc sources of each H-bridge cells is balanced with the proposed cell balancing method. In addition, the switching frequency of each switching device of the CHB inverter becomes equal. A simulation and experimental results are presented with nine-level and five-level three-phase CHB inverter to validate the proposed balancing method.

• Journal of Power Electronics
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• 제19권6호
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• pp.1458-1466
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• 2019

Multilevel inverters have appeared as a successful and utilitarian solution in many power applications. The prime objective of an inverter is to keep the fundamental component of the output voltage of a multilevel inverter at a preferred value. Equally important is the need to keep the harmonic components in the output voltage within stated harmonic limits. Therefore, the basis of this research is to develop a harmonic minimization function that optimizes the switching angles of cascaded H-bridge multilevel inverter. Due to benefits of the Cuckoo Search (CS) algorithm, it is applied to determine the switching angles, which are further used to generate the switching pattern for firing the H-bridges of multilevel inverter. Simulation results are compared with SPWM based firing scheme. The switching frequency for SPWM firing scheme is taken as 200 Hz since the switching losses are increased when switching frequency is high. To validate the ability of Cuckoo Search optimized firing scheme in minimization of harmonics, experimental results obtained from hardware prototype of Five Level Cascaded H-Bridge Multilevel Inverter equipped with a FPGA controller are presented to verify the simulation results.

• 전력전자학회논문지
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• 제12권3호
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• pp.234-240
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• 2007

본 논문에서는 비대칭 컨버터에 비하여 전력소자의 수를 감소하면서도, 고속 운전에 적합한 새로운 멀티레벨 인버터를 제안한다. 제안된 인버터는 기존의 비대칭 컨버터에 비하여 전력소자의 수를 감소시킬 수 있는 특징이 있으며, SRM의 감자구간에서 휠링되는 에너지와 전원에서 공급되는 에너지를 교차적으로 활용하는 방식을 적용함으로써, C-dump 인버터에 비해 커패시터의 정격전압을 낮출 수 있는 장점이 있다. 또한, 제안된 멀티레벨 인버터의 동작 모드는 비대칭 컨버터에 비하여, 충전 레벨의 전원을 정역으로 활용하여 빠른 여자(Excitation)와 감자(Demagnetization) 모드를 가지게 되므로, 제어의 활용성이 매우 높다. 따라서, SRM의 고속 운전에 필요한 여자전류의 빠른 확립을 통하여 응답시간을 개선시키며, 토크 발생구간을 확장시킬 수 있다. 제안된 멀티레벨 인버터 구동형 SRM의 운전특성은 시뮬레이션과 실험을 통해 검증하였다.

• Journal of Power Electronics
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• 제19권6호
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• pp.1477-1485
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• 2019

This paper proposes an effective model predictive current control (MPCC) that involves using 10 virtual voltage vectors to reduce the current harmonics and common-mode voltage (CMV) for a two-level five-phase voltage source inverter (VSI). In the proposed scheme, 10 virtual voltage vectors are included to reduce the CMV and low-order current harmonics. These virtual voltage vectors are employed as the input control set for the MPCC. Among the 10 virtual voltage vectors, two are applied throughout the whole sampling period to reduce current ripples. The two selected virtual voltage vectors are based on location information of the reference voltage vector, and their duration times are calculated using a simple algorithm. This significantly reduces the computational burden. Simulation and experimental results are provided to verify the effectiveness of the proposed scheme.

• 전력전자학회논문지
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• 제15권4호
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• pp.288-295
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• 2010

멀티레벨 인버터는 대용량 전력변환 분야의 요구를 만족하면서 파형왜곡을 감소시켜 전력품질 향상시킬 수 있으므로 근래에 상당히 주목받고 있다. 그런데 전압레벨이 증가함에 따라 복잡한 PWM 알고리즘을 구현하는데 FPGA가 적합하다. 본 논문에서는 FPGA로 5-레벨 다이오드 클램핑형 멀티레벨 인버터의 PWM 신호발생 기법을 제시한다. 유도전동기 제어용 DSP와 FPGA사이에 3상 기준전압 값을 안정되게 전송하는 기법을 제시한다. 32-비트 DSP와 cyclone-III FPGA를 사용한 실험 및 시뮬레이션을 통하여 반송신호 발생 방법으로 PWM 신호를 발생시키는 기법의 타당성을 검증한다.