• The Transactions of the Korean Institute of Electrical Engineers
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• v.43 no.2
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• pp.318-329
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• 1994

This paper deals with the finite wordlength effect on the performance of digital PID controllers. The finite wordlength, one of the major limitation factors in digital controllers, results on two kinds of quantization error : the signal quantization error and the coefficient quantization error. This paper derives the variance of the plant output due to the signal quantization error. Using stability margins as performance criterion, the statistical wordlength concept is adopted for coefficient wordlength selection. Finally, the experimental results exhibit satisfactory performance of the digital PID controller with statistical coefficient wordlength.

• 제어로봇시스템학회:학술대회논문집
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• 1992.10a
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• pp.981-986
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• 1992

In order to implement the digital PID control algorithm, it is necessary to consider the effect of the finite word length(FWL). In this paper, we show the FWL effect in the digital PID controllers. The conception analyse the effects of the signal quantization error in the digital PID algorithm and the coefficient wordlength determined from performance criteria with the statistical wordlength concept. Throughout this paper, it is dealt with the type of controller structure based delta operator the delta operator has such advantages are superior rounfoff noise perfoff noise performance, more accurate coefficient repersentation, and less sensitive control law.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.21 no.2
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• pp.365-374
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• 1996

Finite wordlength effects of the FS-1016 CELP(Code Excite Linear Prediction) vocoder algorithm) is analyzed, and a block floating-Point implementation method is employed to improve the fixed-point performance. An efficient run-time integer wordlength estimation algorithm is developed, and the overall system performance. An efficient run-time integer wordlength estimation algorithm is developed, and the overall system performance is verified in real-time using a TMS320C50 emulation board. Autoscaler software that conducts simulation-based automatic scaling to provide a floating-point like programming environment is used for this application development.

• Journal of IKEEE
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• v.8 no.1 s.14
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• pp.128-135
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• 2004

This paper proposes a phase measurement algorithm which is based on the recursive implementation of sliding-DFT. The algorithm is designed to have a robust behavior against the erroneous factors of frequency drift, additive noise, and twiddle factor approximation. The size of phase error caused by the finite wordlength implementation of DFT twiddle factors is shown significantly lower than that of magnitude error. The drastic reduction of the phase error is achieved by the exploitation of the quadruplet symmetry characteristics of the approximated twiddle factors in the complex plane. Four channel power-line phase measurement system is also designed and implemented based on the time-multiplexed sharing architecture of the proposed algorithm. The operation of the developed system is also verified by the experiment performed under the test environment implemented with the multi-channel function generator and the on-line interfaced host processor system. The proposed algorithm's features of phase measurement accuracy and its robustness against the finite wordlength effects can provide a significant impact especially for the ASIC or microprocessor based embedded system applications where the enhanced processing speed and implementation simplicity are crucial design considerations.

• Proceedings of the KIEE Conference
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• 1999.11c
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• pp.533-536
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• 1999

We consider digital implementation problems of continuous-time controllers. In general, digital controllers use fixed point representation of number and of finite word length(FWL). Under these conditions, this paper investigates the closed-loop stability caused by three design constraints; (i) finite precision representation of the controller parameters, (ii) realization forms such as direct form, cascade form, and parallel form, and (iii) sampling time. We calculate the coefficient stability margins of both predesigned controllers and controller to be implemented. This method can be applied to determine the word length, realization structure, and sampling time so that remains the stability.

• The Transactions of the Korean Institute of Electrical Engineers D
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• v.54 no.3
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• pp.191-193
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• 2005

This paper proposes a phase measurement algorithm which is based on the recursive implementation of sliding-DFT. The proposed algorithm is designed to have a robust behavior against the erroneous factors of frequency drift, additive noise, and twiddle factor approximation. Four channel power-line phase measurement system is also designed and implemented based on the time-multiplexed sharing architecture of the proposed algorithm. The proposed algorithm's features of phase measurement accuracy and its robustness against the finite wordlength effects can provide a significant impact especially for the ASIC or microprocessor based embedded system applications where the enhanced processing speed and implementation simplicity are crucial design considerations.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.61 no.12
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• pp.1898-1902
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• 2012

In this paper, we consider the delay-dependent robust stability condition for polytopic uncertain systems with interval time-varying delay using various combinations of quantization and overflow nonlinearities. A robust stability condition for uncertain systems with time-varying delay and quantization/overflow nonlinearities is proposed by LMI(linear matrix inequality) and Lyapunov technique. It is shown that the proposed method is less conservative compared to the recent results by numerical examples.