• Journal of the Microelectronics and Packaging Society
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• v.20 no.4
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• pp.59-63
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• 2013

In this paper, the impact of the copper densities of substrate layers on IC package warpage is studied experimentally and numerically. The substrate strips used in this study contained two metal layers, with the metal densities and patterns of these two layers varied to determine their impacts. Eight legs of substrate strips were prepared. Leg 1 to leg 5 were prepared with a HD (high density) type of strip and leg 6 to leg 8 were prepared with UHD (ultra high density) type of strip. The top copper metal layer was designed to feature meshed patterns and the bottom copper layer was designed to feature circular patterns. In order to consider the process factors, the warpage of the substrate bottom was measured step by step with the following manufacturing process: (a) bare substrate, (b) die attach, (c) applying mold compound (d) and post reflow. Furthermore, after the post reflow step, the substrate strips were diced to obtain unit packages and the warpage of the unit packages was measured to check the warpage trends and differences. The experimental results showed that the warpage trend is related to the copper densities. In addition to the experiments, a Finite Element Modeling (FEM) was used to simulate the warpage. The nonlinear material properties of mold compound, die attach, solder mask, and substrate core were included in the simulation. Through experiment and simulation, some observations were concluded.

• Proceedings of the KIEE Conference
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• 2006.10d
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• pp.191-193
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• 2006

YBCO wire has a metal substrate to improve the texture structure and highly conductive layers to increase the cryogenic stability. When AC current flows in the YBCO wire, magnetic field which is generated by the AC current magnetizes the metal substrate and induces the eddy current in the stabilizing layer. To examine the effect of the metal substrate and the conducting layer on the transport current loss of YBCO wire, this paper presents the transport current loss of YBCO wire which has metal substrate and conductive layer. YBCO wire with Ni-W substrate and copper layer were chosen as the model HTS wire for numerical calculation. Finite element method has been used to calculate the transport loss and the results of numerical calculation was compared with analytic calculation suggested by Norris.

• ETRI Journal
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• v.28 no.1
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• pp.9-16
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• 2006

In this paper, we analyzed and measured the electrical crosstalk characteristics of a 1.25 Gbps triplexer module for Ethernet passive optical networks to realize fiber-tothe-home services. Electrical crosstalk characteristic of the 1.25 Gbps optical triplexer module on a resistive silicon substrate should be more serious than on a dielectric substrate. Consequently, using the finite element method, we analyze the electrical crosstalk phenomena and propose a silicon substrate structure with a dummy ground line that is the simplest low-crosstalk layout configuration in the 1.25 Gbps optical triplexer module. The triplexer module consists of a laser diode as a transmitter, a digital photodetector as a digital data receiver, and an analog photodetector as a cable television signal receiver. According to IEEE 802.3ah and ITU-T G.983.3, the digital receiver and analog receiver sensitivities have to meet -24 dBm at $BER=10^{-12}$ and -7.7 dBm at 44 dB SNR. The electrical crosstalk levels have to maintain less than -86 dB from DC to 3 GHz. From analysis and measurement results, the proposed silicon substrate structure that contains the dummy line with $100\;{\mu}m$ space from the signal lines and 4 mm separations among the devices satisfies the electrical crosstalk level compared to a simple structure. This proposed structure can be easily implemented with design convenience and greatly reduce the silicon substrate size by about 50 %.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2006.05a
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• pp.99-100
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• 2006

Cold gas dynamic spray or cold-spray is a deposition process, which causes deformation of a thin substrate. The deformation is usually convex to the deposited side. In this research, the main cause of the deformation was investigated using 6061-T6 aluminum alloy. The effects or anisotropic coefficient or thermal expansion (CTE) or the deposited layer by cold-spray and residual stress were studied by experiments and finite element analysis. The Hole Drilling method was applied to measure residual stress in the cold-spray layer and substrate. The data obtained by the experiments were used for the analysis of substrate deformation. From the result of the analysis, it was concluded that compressive residual stress was the main reason of substrate deformation while CTE had little effect.

• Transactions of the Korean Society of Mechanical Engineers A
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• v.37 no.3
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• pp.419-427
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• 2013

The catalytic converters for automobile exhaust systems are manufactured by inserting a mat-wrapped substrate into a stainless steel can. A residual pressure that is too high will initiate a fracture in the substrate. In contrast, a residual pressure that is too low will fail to hold the substrate in the acceleration or deceleration phase. Both the process capability and mat pressure on the substrate are predicted while considering the effect of the statistical variation in the dimensions of the parts. The validity of the solutions is then confirmed. A program using EXCEL combines a finite element analysis and process capability analysis in one program.

• Journal of the Korean Society of Manufacturing Process Engineers
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• v.21 no.6
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• pp.50-59
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• 2022

The design of the substrate significantly affects the thermal history and the residual stress formation in the vicinity of a repaired region by a directed energy deposition (DED) process. The occurrence of defects in the repaired region depends on the thermal history and residual stress formation. The objective of this study was to investigate the influence of the inclined angle and depth of the substrate on the thermal and residual stress characteristics in the vicinity of a repaired region by a DED process through two-dimensional finite element analyses (FEAs). The temperature and residual stress distributions in the vicinity of the repaired region were predicted according to the combination of the inclined angle and depth of the substrate. The effects of the inclined angle and depth on the depth of the heat affected zone and the maximum value of the residual stress were examined. A proper combination of the inclined angle and depth of the substrate was estimated to decrease the residual stress in the vicinity of the repaired region.

• 제어로봇시스템학회:학술대회논문집
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• 2003.10a
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• pp.1664-1667
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• 2003

Aperture-coupled microstrip antenna is one type of microstrip antennas. This type of antenna has bandwidth wider than simple microstrip antenna. Herein, we use two substrates, that have the same dielectric constant 2.47 (PTFE-quartz) in which upper substrate is a rectangular patch. The microstrip patch is fed by a microstrip line which is printed on lower substrate, through an aperture or slot in the common ground plane of patch and microstrip feed. This antenna is analyzed by using Finite Difference Time Domain (FDTD) method the specific design frequency 10 GHz and match impedance is 50 ohms. The simulation results of its characteristics are input impedance, return loss, VSWR and radiation patterns respectively.

• International Journal of Computer Science & Network Security
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• v.21 no.9
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• pp.358-361
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• 2021

In this paper, we have simulated a rectangular microstrip patch antenna for aerospace applications based on graphen as a conductor and a multilayer substrate .as a result of the use of the graphen patch we obtained a reconfigurable antenna on the frequency range (0.6-0.7 terahertz) with a gain up to 12 db. The simulation of this antenna has been performed by using CST Microwave Studio, which is a commercially available finite integral based electromagnetic simulator.

• Journal of the Microelectronics and Packaging Society
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• v.28 no.4
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• pp.31-39
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• 2021

In this paper, warpage analysis that separates PCB for PoP (Package on Package) into unit and substrate using FEM (Finite Element Method), analysis of the effect of layer thickness on warpage, and SN (Signal-to-Noise) ratio by Taguchi method was carried. According to the analysis result, the contribution of the circuit layer on warpage was very high in the unit PCB, and the contribution of the outer layer was particularly high. On the other hand, the substrate PCB had a high influence of the circuit layer on warpage, but it was relatively low compared to the unit PCB, and the influence of the solder resist was rather increased. Therefore, considering the unit PCB and the substrate PCB at the same time, it is desirable to design the PCB for PoP layer-by-layer structure so that the outer and inner circuit layers are thick, the top solder resist is thin, and the thickness of the bottom solder resist is between 5 ㎛ and 25 ㎛.

• Journal of the Microelectronics and Packaging Society
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• v.30 no.1
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• pp.63-70
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• 2023

Today, the importance of power semiconductors continues to increase due to serious environmental pollution and the importance of energy. Particularly, SiC-MOSFET, which is one of the wide bandgap (WBG) devices, has excellent high voltage characteristics and is very important. However, since the electrical properties of SiC-MOSFET are heatsensitive, thermal management through a package is necessary. In this paper, we propose an insulated metal substrate (IMS) method rather than a direct bonded copper (DBC) substrate method used in conventional power semiconductors. IMS is easier to process than DBC and has a high coefficient of thermal expansion (CTE), which is excellent in terms of cost and reliability. Although the thermal conductivity of the dielectric film, which is an insulating layer of IMS, is low, the low thermal conductivity can be sufficiently overcome by allowing a process to be very thin. Electric-thermal co-simulation was carried out in this study to confirm this, and DBC substrate and IMS were manufactured and experimented for verification.