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소결 온도 변화에 따른 $TiO_2$ 전극의 AFM 표면형상 비교 및 DSC 효율 특성 (AFM morphology of $TiO_2$ electrode with differential sintering temperature and efficiency properties Dye-Sensitized solar cells)

  • 김현주;이동윤;구보근;이원재;송재성
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2005년도 하계학술대회 논문집 Vol.6
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    • pp.461-462
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    • 2005
  • In order to improve the efficiency of dye-sensitized solar cell (DSC), $TiO_2$ electrode screen-printed on transparent conducting oxide (TCO) substrate was sintered in variation with different temperature(350 to $550^{\circ}C$). $TiO_2$ electrode on fluorine doped tin oxide (FTO) glass was assembled with Pt counter electrode on FTO glass. I-V properties of DSC were measured under solar simulator. Also, effect of sintering temperature on surface morphology of $TiO_2$ films was investigated to understand correlation between its surface morphology and sintering temperature. Such surface morphology was observed by atomic force microscopy (AFM). From the measurement results, at sintering temperature of $500^{\circ}C$, both efficiency and fill factor of DSC were mutually complementary, enhancing highest fill factor and efficiency. Consequently, it was considered that optimum sintering temperature of $\alpha$-terpinol included $TiO_2$ paste is at $500^{\circ}C$.

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표면 거칠기와 분포 상태에 따른 Si-셀 효율에 관한 연구 (Study on the Efficiency of Si-cell Depending on the Texturing)

  • 오데레사
    • 한국진공학회지
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    • 제20권3호
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    • pp.189-194
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    • 2011
  • 실리콘 태양전지는 KOH 에칭 용액을 이용하여 texturing 시간을 다르게 하는 방법으로 표면의 texturing 상태를 다양하게 제작하였다. 그리고 $POCl_3$ 공정을 이용하여 n형 불순물을 도핑하여 pn접합을 만들었으며, 알루미늄 후면전극과 은 전면전극을 이용하여 Si-cell을 제작하였다. 피라미드 구조가 가장 크고 표면에 고르게 형성된 태양전지 셀에서 F.F. 계수가 높게 나타났으며, 효율도 높게 나타났다. texturing 형성이 잘 이루어진 셀인 경우 빛을 많이 흡수할 수 있고 회로 내부적으로는 직렬저항성분이 감소하여 단락전류성분이 현저히 증가하게 되어 최종적으로 효율이 증가되는 것을 확인하였다.

DSC(Dye-sensitized Solar Cell)의 Grid 간격 변화에 따른 광전특성 연구 (A study on the photoelectric characteristics as a result of changing grid gap)

  • 서현웅;김미정;최진영;홍지태;박성진;김희제
    • 한국신재생에너지학회:학술대회논문집
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    • 한국신재생에너지학회 2006년도 춘계학술대회
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    • pp.199-201
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    • 2006
  • A lot of researches and experiments have been performed to make more efficient dye-sensitized solar cell. Among them, insertion of a grid electrode in DSC is one method to increase overall performance as being shortened distance of electrons' movement by diffusion. In this paper, we measured overall characteristics which is included voltage-current characteristic curve, efficiency, fill factor by comparison between DSC without and with grid electrode. As a result, we got maximum 1.8 times increase of efficiency and approximately 1.7 times rise of fill factor. And we experimented 8, 10, 12, 14mm of grid gap and compared their results to optimize grid gap which is able to incite the most effective movement of electrons. Consequently, we got the result that electrons' movement is the most effect ive when grid gap is approximately 12mm.

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ZnO:Al 투명전도막을 이용한 높은 개방전압을 갖는 비정질 실리콘 박막 태양전지 제조 (Amorphous silicon thin-film solar cells with high open circuit voltage by using textured ZnO:Al front TCO)

  • 이정철;;이준신;송진수;윤경훈
    • 한국신재생에너지학회:학술대회논문집
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    • 한국신재생에너지학회 2006년도 춘계학술대회
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    • pp.158-161
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    • 2006
  • Superstrate pin amorphous silicon thin-film (a-Si:H) solar cells are prepared on $SnO_2:F$ and ZnO:Al transparent conducting oxides (TCO) In order to see the effect of TCO/P-layers on a-Si:H solar cell operation. The solar cells prepared on textured ZnO:Al have higher open circuit voltage $V_{oc}$ than cells prepared on $SnO_2:F$. Presence of thin microcrystalline p-type silicon layer $({\mu}c-Si:H)$ between ZnO:Al and p a-SiC:H plays a major role by causing improvement in fill factor as well as $V_{oc}$, of a-Si:H solar cells prepared on ZnO:Al TCO. Without any treatment of pi interface, we could obtain high $V_{oc}$, of 994mv while keeping fill factor (72.7%) and short circuit current density $J_{sc}$ at the same level as for the cells on $SnO_2:F$ TCO. This high $V_{oc}$ value can be attributed to modification in the current transport in this region due to creation of a potential barrier.

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Full-HD LCOS의 이웃한 픽셀 사이의 Trench구조 변화에 따른 전기광학적 특성 분석 (Electro-optical Characteristics of Full-HD LCOS Depending on the Trench Structure between Adjacent Pixels)

  • 손홍배;김민석;강정원
    • 반도체디스플레이기술학회지
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    • 제8권2호
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    • pp.59-62
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    • 2009
  • In order to check the validation of LC simulation, 0.7 inch LCOS panel in full-HD resolution was fabricated and used for the electro-optical measurement. Compared the measured data with the calculated data, the averaged difference was 1.72% under 0 ~ +6 V bias on pixel electrode. To improve the optical characteristics of full-HD LCOS panel, the planar structure and trench structures (0.1 um, 0.2 um and 0.3 um-in-depth) between adjacent pixels were investigated with LC simulation. The planar structure showed the higher reflectance and faster reflectance-voltage response time than the trench structure. The optical fill factor and contrast ratio of planar structure were also higher than those of trench structures. As compared 1 um-in-depth trench structure resembled to the real structure with the planar structure, the optical fill factor was improved by 1.15% and the contrast ratio was improved by 5.26%. In order to minimize the loss of luminance and contrast ratio, the planar structure need to be applied between adjacent pixels.

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Country Fundamentals and Currency Excess Returns

  • Kim, Daehwan;Song, Chi-Young
    • East Asian Economic Review
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    • 제18권2호
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    • pp.111-142
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    • 2014
  • We examine whether country fundamentals help explain the cross-section of currency excess returns. For this purpose, we consider fundamental variables such as default risk, foreign exchange rate regime, capital control as well as interest rate in the multi-factor model framework. Our empirical results show that fundamental factors explain a large part of the cross-section of currency excess returns. The zero-intercept restriction of the factor model is not rejected for most currencies. They also reveal that our factor model with country fundamentals performs better than a factor model with usual investment-style factors. Our main empirical results are based on 2001-2010 balanced panel data of 19 major currencies. This paper may fill the gap between country fundamentals and practitioners' strategies on currency investment.

개선된 밸리필과 밸리용 승압형 변환기를 결합한 고역률 형광등용 전자식 안정기 (A Unity Power Factor Electronic Ballast for Fluorescent Lamp having Improved Valley Fill and Valley Boost Converter)

  • 윤용식;채균;조규형
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1997년도 하계학술대회 논문집 F
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    • pp.2002-2006
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    • 1997
  • A new PF correction topology, Improved Valley Fill (IVF) with Valley Boost Converter (VBC) used in the electronic ballast for fluorescent lamp is presented. The IVF can adjust the valley voltage higher than half the peak line voltage. Hence, there is no pulsating line current around the line voltage peak, PF and THD are significantly improved. The VBC is added to the IVF to achieve unity PF and to increase the valley voltage. The measured PF and THD for a prototype electronic ballast are 0.997 and 5%, respectively, and the lamp current CF is as low as 1.5

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변형된 벨리필 구조와 전하펌프 커패시터가 결합되어 필라멘트 예열기능과 역률개선능력을 가진 형광등용 전자식 안정기 (Electronic Ballast with Modified Valley fill and Charge Pump Capacitor for Prolonged Filaments Preheating and Power Factor Correction)

  • 채균;류태하;조규형
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1999년도 하계학술대회 논문집 F
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    • pp.2798-2800
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    • 1999
  • A new circuit, modified valley fill (MVF) combined with resonant inductor of the self-excited resonant inverter and charge pump capacitors(CPCs), is presented to achieve high PF electronic ballast providing sufficient preheat current to lamp filaments for soft start maintaining low DC bus voltage. The MVF can adjust the valley voltage higher than half the peak line voltage. The CPCs draw the current from the input line to make up the current waveform during the valley interval. The measured PF and THD are 0.99 and 12%, respectively. The lamp current CF is also acceptable in the proposed circuit. The proposed circuit is suitable for implementing cost-effective electronic ballast.

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능동 블리더 회로를 적용한 조광기 호환용 LED 구동회로에 관한 연구 (A Study on LED Driver Compatible with Triac-dimmer Employing Active Bleeder)

  • 염봉호;홍성수;김택우
    • 전력전자학회논문지
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    • 제19권4호
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    • pp.297-302
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    • 2014
  • In this paper, a LED driver compatible with TRIAC-dimmer applying active bleeder is proposed. If TRIAC-dimmer is connected with LED driver, flicker phenomenon occurs by TRIAC malfunction. In order to prevent this problem, a current over holding current must flow into TRIAC. Therefore, additional circuit compatible with TRIAC-dimmer is required to provide enough current. Passive bleeder has power loss in whole operation period. The proposed circuit apply a valley-fill circuit for power-factor-correction and a novel active bleeder detecting malfunction point of TRIAC. Therefore, it prevent malfunction of TRIAC-dimmer and have advantage of higher efficiency than passive bleeder. To verify the validity of proposed circuit, 13W-lighting LED driver prototype has been proposed.

고온고습 시험을 통한 태양전지의 장기 신뢰성에 관한 연구 (Study on the Long-term Reliability of Solar Cell by High Temperature & Humidity Test)

  • 강민수;전유재;김도석;신영의
    • 에너지공학
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    • 제21권3호
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    • pp.243-248
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    • 2012
  • 본 연구는 고온고습 시험을 통하여 Cell 레벨에서의 표면관찰 및 효율저하를 분석하였다. 고온고습 시험조건은 KS C IEC-61215에서 제시한 PV 모듈하의 조건을 이용하여 온도 $85^{\circ}C$, 습도 85%, 1000hr 동안 수행하였다. EL(Electroluminescence)촬영을 통하여 Cell 표면의 이상 유 무를 분석한 결과, 시간이 경과함에 따라, 부분적으로 표면이 손상되어 변색되는 것을 확인하였다. 고온고습 시험 전 단결정 Cell 및 다결정 Cell의 효율은 각각 17.7%, 15.5%였으며, 1000hr 수행 후 15.6%, 14.0%로 각각 11.9%와 9.3%의 감소율을 보였다. 또한, 경년 시 나타나는 전기적 특성을 분석하기 위하여 FF(Fill Factor)값을 분석한 결과, 고온고습 시험 후 단결정 Cell은 78.7%에서 75.0%로 4.7%, 다결정 Cell은 78.1%에서 76.7%로 1.8%의 감소율을 보였다. 태양전지 실리콘의 원자배열 및 순도에 따라 효율 변화에 영향을 받아 단결정 Cell이 다결정 Cell보다 효율저하가 크게 나타났다고 판단된다. 또한, FF감소율보다 효율 감소율이 크게 저하된 것을 확인할 수 있었으며, 이는 Cell의 외부환경적 요인에 의한 표면 손상이 p-n접합층 접촉저항과 경년 시 나타나는 FF 감소율보다 크게 영향을 준 것으로 판단된다.