• Transactions on Electrical and Electronic Materials
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• 제11권4호
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• pp.182-185
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• 2010

$Pb_{0.99}[(Zr_{0.6}Sn_{0.4})_{0.9}Ti_{0.1}]_{0.98}Nb_{0.02}O_3$ (PNZST) thin films were deposited by radio frequency magnetron sputtering on a $(La_{0.5}Sr_{0.5})CoO_3$ (LSCO)/Pt/Ti/$SiO_2$/Si substrate using a PNZST target with an excess PbO of 10 mole%. The thin films deposited at the substrate temperature of $500^{\circ}C$ crystallized to a perovskite phase after rapid thermal annealing (RTA). The thin films, which annealed at $650^{\circ}C$ for 10 seconds in air, exhibited good crystal structures and ferroelectric properties. The remanent polarization and coercive field of the fabricated PNZST capacitor were approximately $20uC/cm^2$ and 50 kV/cm, respectively. The reduction of the polarization after $2.2\;{\times}\;10^9$ switching cycles was less than 10%.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2005년도 제36회 하계학술대회 논문집 C
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• pp.1829-1831
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• 2005

Ferroelectric $Bi_{3.25}Nd_{0.75}Ti_3O_{12}$(BNdT) thin films were proposed for capacitor of FeRAM. The BNdT thin films were grown on Pt/Ti $SiO_2/P-Si(100)$ substrates by the RF magnetron sputtering deposition. The dielectric properties of the BNdT were investigated by varying post-annealing temperatures. Increasing post-annealing temperature, the (117) peak was increased. An increase of rod type grains of BNdT films with increasing post-annealing temperature was observed by the Field Emission Scanning Electron Microscopy(FE-SEM). The dielectric constant and dielectric loss of the BNdT thin films with post-annealing temperature of $700^{\circ}C$ were 418 and 0.37, respectively.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 1999년도 추계학술대회 논문집
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• pp.278-281
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• 1999

PLZT thin films on Pt/Ti/SiO$_2$/Si substrate were fabricated with different Thickness by pulsed laser deposition. 14/50/50 PLZT thin film showed a maximum dielectric constant value of $\varepsilon$$_{t}$=985 at 5000$\AA$, and $\varepsilon$$_{t}$=668 at 2000A. P-EI hysteresis loop of 14/50/50 PLZT thin film was slim ferroelectric. Leakage current density of 14/50/70 PLZT thin film was 10$^{-8}$ A/$\textrm{cm}^2$ at 2000$\AA$.EX>.

• 한국전기전자재료학회논문지
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• 제36권1호
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• pp.88-92
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• 2023

The ferroelectricity in Hf_0.5Zr_0.5O₂ (HZO) thin films is one of the most interesting topics for next-generation nonvolatile memory applications. It is known that a crystallization process is required at a temperature of 400℃ or higher to form an orthorhombic phase that results in the ferroelectric properties of the HZO film. However, to realize the integration of ferroelectric HZO films in the back-end-of-line, it is necessary to reduce the annealing temperature below 400℃. This study aims to comprehensively analyze the ferroelectric properties according to the annealing temperature (350-500℃) and time (1-5 h) using a furnace as a crystallization method for HZO films. As a result, the ferroelectric behaviors of the HZO films were achieved at a temperature of 400℃ or higher regardless of the annealing time. At the annealing temperature of 350℃, the ferroelectric properties appeared only when the annealing time was sufficiently increased (4 h or more). Based on these results, it was experimentally confirmed that the optimization of the annealing temperature and time is very important for the ferroelectric phase crystallization of HZO films and the improvement of their ferroelectric properties.

• 한국재료학회:학술대회논문집
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• 한국재료학회 1998년도 IUMRS-ICEM ABSTRACT BOOK
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• pp.41.1-41
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• 1998

• 대한전기학회:학술대회논문집
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• 대한전기학회 1999년도 하계학술대회 논문집 D
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• pp.1986-1988
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• 1999

Ferroelectric lead zirconate titanate(PZT) thin films were prepared on various bottom electrodes by rf magnetron sputtering methode. The structural phase and surface morphology of the PZT thin films were largely affected by the bottom electrodes. P-E curves of PZT thin films deposited on Pt. $RuO_2$ and Ru/$RuO_2$ bottom electrode showed typical P-E hysteresis loop. The measure values of $P_r,\;E_c$ of the Ru/PZT/Ru/$RuO_2$ capacitor were $16.9{\mu}C/Cm^2$, 140kV/ cm, respectively. The Ru/PZT/Ru/$RuO_2$ capacitors were fatigue free uP to nearly $10^9$ switching cycle but Pt/PZT/Pt capacitor showed 34% degradation uP to $10^9$ switching cycle.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2002년도 하계학술대회 논문집
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• pp.326-329
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• 2002

In this paper, we investigated a feasibility of cerium oxide(CeO$_2$) films as a buffer layer of MFIS(metal ferroelectric insulator semiconductor) type capacitor. CeO$_2$ layer were Prepared by two step process of a low temperature film growth and subsequent RTA (rapid thermal annealing) treatment. By app1ying an ultra thin Ce metal seed layer and N$_2$ Plasma treatment, dielectric and interface properties were improved. It means that unwanted SiO$_2$ layer generation was successfully suppressed at the interface between He buffer layer and Si substrate. The lowest lattice mismatch of CeO$_2$ film was as low as 1.76% and average surface roughness was less than 0.7 m. The Al/CeO$_2$/Si structure shows breakdown electric field of 1.2 MV/cm, dielectric constant of more than 15.1 and interface state densities as low as 1.84${\times}$10$\^$11/ cm$\^$-1/eV$\^$-1/. After N$_2$ plasma treatment, the leakage current was reduced with about 2-order.

• E2M - 전기 전자와 첨단 소재
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• 제9권4호
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• pp.336-343
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• 1996

We have studied the preparation and the properties of $Ba_{1-x}$Sr$_{x}$TiO$_{3}$(BST) thin films by using the sol-gel method. Through the comparison of the effects of various solvents and additives in making solutions, we establish the production method of the stable solution which generates the high quality of BST film. We also set up the heat-treatment conditions for depositing the BST thin film through the TGA and XRD analyses. Through the comparison of the surface conditions of BST films deposited on Pt/Ta/SiO$_{2}$/Si and Pt/Ti/SiO$_{2}$/Si substrates, we find that Ta is more efficient diffusion barrier of Si than Ti so that Ta layer prevents the formation of hillocks. We fabricate the planar type capacitor and measure the dielectric properties of the BST thin film deposited on the Pt/Ta/SiO$_{2}$/Si substrate. Dielectric constant and dielectric loss tangent at 1V, 10kHz, and leakage current density at 3V of the BST thin film are 339, 0.052 and 13.3.mu.A/cm$^{2}$, respectively.ely.

• 대한전자공학회논문지SD
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• 제38권11호
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• pp.765-770
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• 2001

고온 급속 열처리시킨 LiNbO₃/AIN/Si(100) 구조를 이용하여 MFIS 소자를 제작하고, 비휘발성 메모리 동작 가능성을 확인하였다. 고유전율 AIN 박막 위에 Pt 전극을 증착시켜 제작한 MIS 구조에서 측정한 1MHz C-V 특성곡선에서는 히스테리시스가 전혀 없고 양호한 계면특성을 보였으며, 축적 영역으로부터 산출한 비유전율 값은 약 8 이었다. Pt/LiNbO₃/AIN/Si(100) 구조에서 측정한 1MHz C-V 특성의 축적영역에서 산출한 LiNbO₃ 박막의 비유전율 값은 약 23 이었으며, ±5 V의 바이어스 범위 내에서의 메모리 윈도우는 약 1.2 V이었다. 이 MFIS 구조에서의 게이트 누설전류밀도는 ±500 kV/cm의 전계 범위 내에서 10/sup -9/ A/㎠ 범위를 유지하였다. 500 kHz의 바이폴러 펄스를 인가하면서 측정한 피로특성은 10/sup 11/ cycle 까지 초기값을 거의 유지하는 우수한 특성을 보였다.

• 한국진공학회지
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• 제11권4호
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• pp.230-234
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• 2002

고온 급속 열처리를 행한 $LiNbO_3Si$/(100) 구조를 가지고 여러 가지 전극을 사용하여 금속/강유전체/반도체 커패시터를 제작하였으며, 제작한 커패시터의 비휘발성 메모리 응용 가능성을 확인하였다. MFS 커패시터의 C-V 특성 곡선에서는 LiNbO$_3$박막의 강유전성으로 인한 히스테리시스 특성이 관측되었으며, 1 MHz C-V 특성 곡선의 축적 영역에서 산출한 비유전율은 약 25 이었다. Pt 전극을 사용하여 제작한 커패시터에서는 인가 전계 500 kV/cm 범위에서 $1\times10^{-8}$ A/cm 이하의 우수한 누설전류 특성이 나타났다. midgap 부근에서의 계면 준위 밀도는 약 $10^{11}\textrm{cm}^2$.eV 이었으며, 잔류분극 값은 약 1.2 $\muC/\textrm{cm}^2$ 였다. Pt 전극과 A1 전극 모두 500 kHz 주파수의 바이폴러 펄스를 인가하면서 측정한 피로 특성에서 $10^{10}$ cycle 까지 측정된 잔류 분극 값이 초기 값과 같았다.